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[MSP430] add tests for unwanted shift codegen; NFC (PR43542)
llvm-svn: 373607
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61
test/CodeGen/MSP430/selectcc.ll
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61
test/CodeGen/MSP430/selectcc.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=msp430-- < %s | FileCheck %s
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define i16 @select_to_shifts_i16(i16 %a, i16 %b) {
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; CHECK-LABEL: select_to_shifts_i16:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov.b r12, r12
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; CHECK-NEXT: swpb r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: add r12, r12
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; CHECK-NEXT: swpb r12
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; CHECK-NEXT: sxt r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: rra r12
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; CHECK-NEXT: and r13, r12
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; CHECK-NEXT: ret
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%and = and i16 %a, 2
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%tobool = icmp eq i16 %and, 0
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%select = select i1 %tobool, i16 0, i16 %b
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ret i16 %select
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}
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define i32 @select_to_shifts_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: select_to_shifts_i32:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: mov r12, r13
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; CHECK-NEXT: mov.b r13, r13
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; CHECK-NEXT: swpb r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: add r13, r13
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; CHECK-NEXT: swpb r13
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; CHECK-NEXT: sxt r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: rra r13
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; CHECK-NEXT: and r13, r14
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; CHECK-NEXT: and r15, r13
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; CHECK-NEXT: mov r14, r12
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; CHECK-NEXT: ret
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%and = and i32 %a, 2
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%tobool = icmp eq i32 %and, 0
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%select = select i1 %tobool, i32 0, i32 %b
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ret i32 %select
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}
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