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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00

implement a simple instcombine xform that has been in the

readme forever.

llvm-svn: 94318
This commit is contained in:
Chris Lattner 2010-01-23 18:49:30 +00:00
parent 744a23610a
commit 8909d5aca5
3 changed files with 44 additions and 23 deletions

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@ -237,24 +237,6 @@ define void @test(i32* %P) {
//===---------------------------------------------------------------------===//
dag/inst combine "clz(x)>>5 -> x==0" for 32-bit x.
Compile:
int bar(int x)
{
int t = __builtin_clz(x);
return -(t>>5);
}
to:
_bar: addic r3,r3,-1
subfe r3,r3,r3
blr
//===---------------------------------------------------------------------===//
quantum_sigma_x in 462.libquantum contains the following loop:
for(i=0; i<reg->size; i++)
@ -294,6 +276,8 @@ unsigned long reverse(unsigned v) {
//===---------------------------------------------------------------------===//
[LOOP RECOGNITION]
These idioms should be recognized as popcount (see PR1488):
unsigned countbits_slow(unsigned v) {

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@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "InstCombine.h"
#include "llvm/IntrinsicInst.h"
#include "llvm/Support/PatternMatch.h"
using namespace llvm;
using namespace PatternMatch;
@ -69,10 +70,9 @@ Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
if (Op1->uge(TypeBits)) {
if (I.getOpcode() != Instruction::AShr)
return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
else {
I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
return &I;
}
// ashr i32 X, 32 --> ashr i32 X, 31
I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
return &I;
}
// ((X*C1) << C2) == (X * (C1 << C2))
@ -387,7 +387,29 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) {
}
Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
return commonShiftTransforms(I);
if (Instruction *R = commonShiftTransforms(I))
return R;
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1))
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
// ctlz.i32(x)>>5 --> zext(x == 0)
// cttz.i32(x)>>5 --> zext(x == 0)
// ctpop.i32(x)>>5 --> zext(x == -1)
if ((II->getIntrinsicID() == Intrinsic::ctlz ||
II->getIntrinsicID() == Intrinsic::cttz ||
II->getIntrinsicID() == Intrinsic::ctpop) &&
(1ULL << Op1C->getZExtValue()) ==
Op0->getType()->getScalarSizeInBits()) {
bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1 : 0);
Value *Cmp = Builder->CreateICmpEQ(II->getOperand(1), RHS);
return new ZExtInst(Cmp, II->getType());
}
}
return 0;
}
Instruction *InstCombiner::visitAShr(BinaryOperator &I) {

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@ -144,3 +144,18 @@ entry:
; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
; CHECK-NEXT: volatile store i1 %pop.cmp, i1* %c
}
define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
%shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
ret i32 %shr3
; CHECK: @cttz_simplify1
; CHECK: icmp eq i32 %x, 0
; CHECK-NEXT: zext i1
; CHECK-NEXT: ret i32
}
declare i32 @llvm.ctlz.i32(i32) nounwind readnone