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implement a simple instcombine xform that has been in the
readme forever. llvm-svn: 94318
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@ -237,24 +237,6 @@ define void @test(i32* %P) {
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//===---------------------------------------------------------------------===//
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dag/inst combine "clz(x)>>5 -> x==0" for 32-bit x.
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Compile:
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int bar(int x)
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{
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int t = __builtin_clz(x);
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return -(t>>5);
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}
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to:
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_bar: addic r3,r3,-1
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subfe r3,r3,r3
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blr
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//===---------------------------------------------------------------------===//
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quantum_sigma_x in 462.libquantum contains the following loop:
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for(i=0; i<reg->size; i++)
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@ -294,6 +276,8 @@ unsigned long reverse(unsigned v) {
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//===---------------------------------------------------------------------===//
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[LOOP RECOGNITION]
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These idioms should be recognized as popcount (see PR1488):
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unsigned countbits_slow(unsigned v) {
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@ -12,6 +12,7 @@
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//===----------------------------------------------------------------------===//
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#include "InstCombine.h"
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#include "llvm/IntrinsicInst.h"
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#include "llvm/Support/PatternMatch.h"
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using namespace llvm;
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using namespace PatternMatch;
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@ -69,10 +70,9 @@ Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
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if (Op1->uge(TypeBits)) {
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if (I.getOpcode() != Instruction::AShr)
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return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
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else {
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I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
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return &I;
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}
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// ashr i32 X, 32 --> ashr i32 X, 31
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I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
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return &I;
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}
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// ((X*C1) << C2) == (X * (C1 << C2))
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@ -387,7 +387,29 @@ Instruction *InstCombiner::visitShl(BinaryOperator &I) {
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}
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Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
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return commonShiftTransforms(I);
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if (Instruction *R = commonShiftTransforms(I))
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return R;
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1))
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if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
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// ctlz.i32(x)>>5 --> zext(x == 0)
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// cttz.i32(x)>>5 --> zext(x == 0)
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// ctpop.i32(x)>>5 --> zext(x == -1)
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if ((II->getIntrinsicID() == Intrinsic::ctlz ||
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II->getIntrinsicID() == Intrinsic::cttz ||
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II->getIntrinsicID() == Intrinsic::ctpop) &&
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(1ULL << Op1C->getZExtValue()) ==
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Op0->getType()->getScalarSizeInBits()) {
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bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
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Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1 : 0);
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Value *Cmp = Builder->CreateICmpEQ(II->getOperand(1), RHS);
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return new ZExtInst(Cmp, II->getType());
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}
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}
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return 0;
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}
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Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
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@ -144,3 +144,18 @@ entry:
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; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
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; CHECK-NEXT: volatile store i1 %pop.cmp, i1* %c
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}
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define i32 @cttz_simplify1(i32 %x) nounwind readnone ssp {
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%tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x) ; <i32> [#uses=1]
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%shr3 = lshr i32 %tmp1, 5 ; <i32> [#uses=1]
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ret i32 %shr3
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; CHECK: @cttz_simplify1
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; CHECK: icmp eq i32 %x, 0
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; CHECK-NEXT: zext i1
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; CHECK-NEXT: ret i32
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}
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declare i32 @llvm.ctlz.i32(i32) nounwind readnone
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