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https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 12:12:47 +01:00
restore old srcValueNode behavior and try to to work around it
llvm-svn: 22315
This commit is contained in:
parent
83170cd9ba
commit
898efb338a
@ -1394,6 +1394,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
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}
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}
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SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
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SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
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assert((!V || isa<PointerType>(V->getType())) &&
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"SrcValue is not a pointer?");
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SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
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SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
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if (N) return SDOperand(N, 0);
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if (N) return SDOperand(N, 0);
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@ -644,7 +644,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
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}
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}
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SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), Root, Ptr,
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SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), Root, Ptr,
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DAG.getSrcValue(&I));
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DAG.getSrcValue(I.getOperand(0)));
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setValue(&I, L);
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setValue(&I, L);
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if (I.isVolatile())
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if (I.isVolatile())
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@ -659,7 +659,7 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
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SDOperand Src = getValue(SrcV);
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SDOperand Src = getValue(SrcV);
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SDOperand Ptr = getValue(I.getOperand(1));
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SDOperand Ptr = getValue(I.getOperand(1));
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DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
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DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
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DAG.getSrcValue(&I)));
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DAG.getSrcValue(I.getOperand(1))));
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}
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}
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void SelectionDAGLowering::visitCall(CallInst &I) {
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void SelectionDAGLowering::visitCall(CallInst &I) {
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@ -604,37 +604,48 @@ void AlphaISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
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}
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}
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}
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}
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//Find the offset of the arg in it's parent's function
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static void getValueInfo(const Value* v, int& type, int& fun, int& offset)
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static int getValueOffset(const Value* v)
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{
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{
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if (v == NULL)
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if (v == NULL) {
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return 0;
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type = 0;
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fun = 0;
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const Instruction* itarget = dyn_cast<Instruction>(v);
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offset = 0;
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const BasicBlock* btarget = itarget->getParent();
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} else if (const GlobalValue* GV = dyn_cast<GlobalValue>(v)) {
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const Function* ftarget = btarget->getParent();
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type = 1;
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fun = 1;
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//offset due to earlier BBs
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const Module* M = GV->getParent();
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int i = 1;
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int i = 0;
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for(Function::const_iterator ii = ftarget->begin(); &*ii != btarget; ++ii)
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for(Module::const_global_iterator ii = M->global_begin(); &*ii != GV; ++ii)
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i += ii->size();
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++i;
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offset = i;
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for(BasicBlock::const_iterator ii = btarget->begin(); &*ii != itarget; ++ii)
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} else if (const Argument* Arg = dyn_cast<Argument>(v)) {
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++i;
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type = 2;
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const Function* F = Arg->getParent();
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return i;
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const Module* M = F->getParent();
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}
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int i = 0;
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//Find the offset of the function in it's module
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for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii)
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static int getFunctionOffset(const Function* fun)
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++i;
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{
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fun = i;
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const Module* M = fun->getParent();
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i = 0;
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for(Function::const_arg_iterator ii = F->arg_begin(); &*ii != Arg; ++ii)
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//offset due to earlier BBs
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++i;
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int i = 0;
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offset = i;
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for(Module::const_iterator ii = M->begin(); &*ii != fun; ++ii)
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} else if (const Instruction* I = dyn_cast<Instruction>(v)) {
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++i;
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type = 3;
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const BasicBlock* bb = I->getParent();
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return i;
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const Function* F = bb->getParent();
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const Module* M = F->getParent();
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int i = 0;
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for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii)
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++i;
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fun = i;
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i = 0;
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for(Function::const_iterator ii = F->begin(); &*ii != bb; ++ii)
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i += ii->size();
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for(BasicBlock::const_iterator ii = bb->begin(); &*ii != I; ++ii)
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++i;
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offset = i;
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}
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}
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}
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static int getUID()
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static int getUID()
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@ -1244,18 +1255,18 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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assert(opcode != ISD::SEXTLOAD && "Not zext"); break;
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assert(opcode != ISD::SEXTLOAD && "Not zext"); break;
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}
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}
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int i = 0, j = 0;
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int i, j, k;
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if (EnableAlphaLSMark) {
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if (EnableAlphaLSMark)
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i = getValueOffset(dyn_cast<SrcValueSDNode>(N.getOperand(2))
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getValueInfo(dyn_cast<SrcValueSDNode>(N.getOperand(2))->getValue(),
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->getValue());
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i, j, k);
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j = getFunctionOffset(BB->getParent()->getFunction());
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}
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if (GlobalAddressSDNode *GASD =
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if (GlobalAddressSDNode *GASD =
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dyn_cast<GlobalAddressSDNode>(Address)) {
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dyn_cast<GlobalAddressSDNode>(Address)) {
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if (GASD->getGlobal()->isExternal()) {
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if (GASD->getGlobal()->isExternal()) {
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Tmp1 = SelectExpr(Address);
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Tmp1 = SelectExpr(Address);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 2, Result).addImm(0).addReg(Tmp1);
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BuildMI(BB, Opc, 2, Result).addImm(0).addReg(Tmp1);
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} else {
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} else {
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Tmp1 = MakeReg(MVT::i64);
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Tmp1 = MakeReg(MVT::i64);
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@ -1263,7 +1274,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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BuildMI(BB, Alpha::LDAHr, 2, Tmp1)
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BuildMI(BB, Alpha::LDAHr, 2, Tmp1)
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.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
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.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, GetRelVersion(Opc), 2, Result)
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BuildMI(BB, GetRelVersion(Opc), 2, Result)
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.addGlobalAddress(GASD->getGlobal()).addReg(Tmp1);
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.addGlobalAddress(GASD->getGlobal()).addReg(Tmp1);
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}
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}
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@ -1274,12 +1286,14 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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BuildMI(BB, Alpha::LDAHr, 2, Tmp1).addConstantPoolIndex(CP->getIndex())
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BuildMI(BB, Alpha::LDAHr, 2, Tmp1).addConstantPoolIndex(CP->getIndex())
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.addReg(Alpha::R29);
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.addReg(Alpha::R29);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, GetRelVersion(Opc), 2, Result)
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BuildMI(BB, GetRelVersion(Opc), 2, Result)
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.addConstantPoolIndex(CP->getIndex()).addReg(Tmp1);
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.addConstantPoolIndex(CP->getIndex()).addReg(Tmp1);
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} else if(Address.getOpcode() == ISD::FrameIndex) {
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} else if(Address.getOpcode() == ISD::FrameIndex) {
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 2, Result)
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BuildMI(BB, Opc, 2, Result)
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.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
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.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
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.addReg(Alpha::F31);
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.addReg(Alpha::F31);
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@ -1287,7 +1301,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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long offset;
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long offset;
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SelectAddr(Address, Tmp1, offset);
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SelectAddr(Address, Tmp1, offset);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
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BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
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}
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}
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return Result;
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return Result;
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@ -1298,7 +1313,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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has_sym = true;
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has_sym = true;
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(0).addImm(1).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(0).addImm(0).addImm(0)
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.addImm(getUID());
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BuildMI(BB, Alpha::LDQl, 2, Result)
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BuildMI(BB, Alpha::LDQl, 2, Result)
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.addGlobalAddress(cast<GlobalAddressSDNode>(N)->getGlobal())
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.addGlobalAddress(cast<GlobalAddressSDNode>(N)->getGlobal())
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@ -2268,19 +2284,18 @@ void AlphaISel::Select(SDOperand N) {
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}
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}
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}
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}
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int i = 0, j = 0;
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int i, j, k;
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if (EnableAlphaLSMark) {
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if (EnableAlphaLSMark)
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i =
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getValueInfo(dyn_cast<SrcValueSDNode>(N.getOperand(3))->getValue(),
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getValueOffset(dyn_cast<SrcValueSDNode>(N.getOperand(3))->getValue());
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i, j, k);
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j = getFunctionOffset(BB->getParent()->getFunction());
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}
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if (GlobalAddressSDNode *GASD =
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if (GlobalAddressSDNode *GASD =
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dyn_cast<GlobalAddressSDNode>(Address)) {
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dyn_cast<GlobalAddressSDNode>(Address)) {
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if (GASD->getGlobal()->isExternal()) {
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if (GASD->getGlobal()->isExternal()) {
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Tmp2 = SelectExpr(Address);
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Tmp2 = SelectExpr(Address);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
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BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
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} else {
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} else {
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Tmp2 = MakeReg(MVT::i64);
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Tmp2 = MakeReg(MVT::i64);
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@ -2288,13 +2303,15 @@ void AlphaISel::Select(SDOperand N) {
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BuildMI(BB, Alpha::LDAHr, 2, Tmp2)
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BuildMI(BB, Alpha::LDAHr, 2, Tmp2)
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.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
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.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, GetRelVersion(Opc), 3).addReg(Tmp1)
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BuildMI(BB, GetRelVersion(Opc), 3).addReg(Tmp1)
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.addGlobalAddress(GASD->getGlobal()).addReg(Tmp2);
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.addGlobalAddress(GASD->getGlobal()).addReg(Tmp2);
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}
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}
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} else if(Address.getOpcode() == ISD::FrameIndex) {
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} else if(Address.getOpcode() == ISD::FrameIndex) {
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 3).addReg(Tmp1)
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BuildMI(BB, Opc, 3).addReg(Tmp1)
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.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
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.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
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.addReg(Alpha::F31);
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.addReg(Alpha::F31);
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@ -2302,7 +2319,8 @@ void AlphaISel::Select(SDOperand N) {
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long offset;
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long offset;
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SelectAddr(Address, Tmp2, offset);
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SelectAddr(Address, Tmp2, offset);
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if (EnableAlphaLSMark)
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if (EnableAlphaLSMark)
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BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID());
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BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
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.addImm(getUID());
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BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2);
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BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2);
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}
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}
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return;
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return;
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@ -31,7 +31,8 @@ def ADJUSTSTACKUP : PseudoInstAlpha<(ops ), "ADJUP">;
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def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops ), "ADJDOWN">;
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def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops ), "ADJDOWN">;
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def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n">;
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def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n">;
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def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n">;
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def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n">;
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def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k), "LSMARKER$$$i$$$j$$$k:\n">;
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def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m),
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"LSMARKER$$$i$$$j$$$k$$$m:\n">;
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//*****************
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//*****************
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//These are shortcuts, the assembler expands them
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//These are shortcuts, the assembler expands them
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