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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00

restore old srcValueNode behavior and try to to work around it

llvm-svn: 22315
This commit is contained in:
Andrew Lenharth 2005-06-29 18:54:02 +00:00
parent 83170cd9ba
commit 898efb338a
4 changed files with 76 additions and 55 deletions

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@ -1394,6 +1394,8 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
} }
SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) {
assert((!V || isa<PointerType>(V->getType())) &&
"SrcValue is not a pointer?");
SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; SDNode *&N = ValueNodes[std::make_pair(V, Offset)];
if (N) return SDOperand(N, 0); if (N) return SDOperand(N, 0);

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@ -644,7 +644,7 @@ void SelectionDAGLowering::visitLoad(LoadInst &I) {
} }
SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), Root, Ptr, SDOperand L = DAG.getLoad(TLI.getValueType(I.getType()), Root, Ptr,
DAG.getSrcValue(&I)); DAG.getSrcValue(I.getOperand(0)));
setValue(&I, L); setValue(&I, L);
if (I.isVolatile()) if (I.isVolatile())
@ -659,7 +659,7 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
SDOperand Src = getValue(SrcV); SDOperand Src = getValue(SrcV);
SDOperand Ptr = getValue(I.getOperand(1)); SDOperand Ptr = getValue(I.getOperand(1));
DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr, DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
DAG.getSrcValue(&I))); DAG.getSrcValue(I.getOperand(1))));
} }
void SelectionDAGLowering::visitCall(CallInst &I) { void SelectionDAGLowering::visitCall(CallInst &I) {

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@ -604,37 +604,48 @@ void AlphaISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
} }
} }
//Find the offset of the arg in it's parent's function static void getValueInfo(const Value* v, int& type, int& fun, int& offset)
static int getValueOffset(const Value* v)
{ {
if (v == NULL) if (v == NULL) {
return 0; type = 0;
fun = 0;
const Instruction* itarget = dyn_cast<Instruction>(v); offset = 0;
const BasicBlock* btarget = itarget->getParent(); } else if (const GlobalValue* GV = dyn_cast<GlobalValue>(v)) {
const Function* ftarget = btarget->getParent(); type = 1;
fun = 1;
//offset due to earlier BBs const Module* M = GV->getParent();
int i = 1; int i = 0;
for(Function::const_iterator ii = ftarget->begin(); &*ii != btarget; ++ii) for(Module::const_global_iterator ii = M->global_begin(); &*ii != GV; ++ii)
i += ii->size(); ++i;
offset = i;
for(BasicBlock::const_iterator ii = btarget->begin(); &*ii != itarget; ++ii) } else if (const Argument* Arg = dyn_cast<Argument>(v)) {
++i; type = 2;
const Function* F = Arg->getParent();
return i; const Module* M = F->getParent();
} int i = 0;
//Find the offset of the function in it's module for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii)
static int getFunctionOffset(const Function* fun) ++i;
{ fun = i;
const Module* M = fun->getParent(); i = 0;
for(Function::const_arg_iterator ii = F->arg_begin(); &*ii != Arg; ++ii)
//offset due to earlier BBs ++i;
int i = 0; offset = i;
for(Module::const_iterator ii = M->begin(); &*ii != fun; ++ii) } else if (const Instruction* I = dyn_cast<Instruction>(v)) {
++i; type = 3;
const BasicBlock* bb = I->getParent();
return i; const Function* F = bb->getParent();
const Module* M = F->getParent();
int i = 0;
for(Module::const_iterator ii = M->begin(); &*ii != F; ++ii)
++i;
fun = i;
i = 0;
for(Function::const_iterator ii = F->begin(); &*ii != bb; ++ii)
i += ii->size();
for(BasicBlock::const_iterator ii = bb->begin(); &*ii != I; ++ii)
++i;
offset = i;
}
} }
static int getUID() static int getUID()
@ -1244,18 +1255,18 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
assert(opcode != ISD::SEXTLOAD && "Not zext"); break; assert(opcode != ISD::SEXTLOAD && "Not zext"); break;
} }
int i = 0, j = 0; int i, j, k;
if (EnableAlphaLSMark) { if (EnableAlphaLSMark)
i = getValueOffset(dyn_cast<SrcValueSDNode>(N.getOperand(2)) getValueInfo(dyn_cast<SrcValueSDNode>(N.getOperand(2))->getValue(),
->getValue()); i, j, k);
j = getFunctionOffset(BB->getParent()->getFunction());
}
if (GlobalAddressSDNode *GASD = if (GlobalAddressSDNode *GASD =
dyn_cast<GlobalAddressSDNode>(Address)) { dyn_cast<GlobalAddressSDNode>(Address)) {
if (GASD->getGlobal()->isExternal()) { if (GASD->getGlobal()->isExternal()) {
Tmp1 = SelectExpr(Address); Tmp1 = SelectExpr(Address);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 2, Result).addImm(0).addReg(Tmp1); BuildMI(BB, Opc, 2, Result).addImm(0).addReg(Tmp1);
} else { } else {
Tmp1 = MakeReg(MVT::i64); Tmp1 = MakeReg(MVT::i64);
@ -1263,7 +1274,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
BuildMI(BB, Alpha::LDAHr, 2, Tmp1) BuildMI(BB, Alpha::LDAHr, 2, Tmp1)
.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29); .addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, GetRelVersion(Opc), 2, Result) BuildMI(BB, GetRelVersion(Opc), 2, Result)
.addGlobalAddress(GASD->getGlobal()).addReg(Tmp1); .addGlobalAddress(GASD->getGlobal()).addReg(Tmp1);
} }
@ -1274,12 +1286,14 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
BuildMI(BB, Alpha::LDAHr, 2, Tmp1).addConstantPoolIndex(CP->getIndex()) BuildMI(BB, Alpha::LDAHr, 2, Tmp1).addConstantPoolIndex(CP->getIndex())
.addReg(Alpha::R29); .addReg(Alpha::R29);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, GetRelVersion(Opc), 2, Result) BuildMI(BB, GetRelVersion(Opc), 2, Result)
.addConstantPoolIndex(CP->getIndex()).addReg(Tmp1); .addConstantPoolIndex(CP->getIndex()).addReg(Tmp1);
} else if(Address.getOpcode() == ISD::FrameIndex) { } else if(Address.getOpcode() == ISD::FrameIndex) {
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 2, Result) BuildMI(BB, Opc, 2, Result)
.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex()) .addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
.addReg(Alpha::F31); .addReg(Alpha::F31);
@ -1287,7 +1301,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
long offset; long offset;
SelectAddr(Address, Tmp1, offset); SelectAddr(Address, Tmp1, offset);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1); BuildMI(BB, Opc, 2, Result).addImm(offset).addReg(Tmp1);
} }
return Result; return Result;
@ -1298,7 +1313,8 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
has_sym = true; has_sym = true;
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(0).addImm(1).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(0).addImm(0).addImm(0)
.addImm(getUID());
BuildMI(BB, Alpha::LDQl, 2, Result) BuildMI(BB, Alpha::LDQl, 2, Result)
.addGlobalAddress(cast<GlobalAddressSDNode>(N)->getGlobal()) .addGlobalAddress(cast<GlobalAddressSDNode>(N)->getGlobal())
@ -2268,19 +2284,18 @@ void AlphaISel::Select(SDOperand N) {
} }
} }
int i = 0, j = 0; int i, j, k;
if (EnableAlphaLSMark) { if (EnableAlphaLSMark)
i = getValueInfo(dyn_cast<SrcValueSDNode>(N.getOperand(3))->getValue(),
getValueOffset(dyn_cast<SrcValueSDNode>(N.getOperand(3))->getValue()); i, j, k);
j = getFunctionOffset(BB->getParent()->getFunction());
}
if (GlobalAddressSDNode *GASD = if (GlobalAddressSDNode *GASD =
dyn_cast<GlobalAddressSDNode>(Address)) { dyn_cast<GlobalAddressSDNode>(Address)) {
if (GASD->getGlobal()->isExternal()) { if (GASD->getGlobal()->isExternal()) {
Tmp2 = SelectExpr(Address); Tmp2 = SelectExpr(Address);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2); BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(0).addReg(Tmp2);
} else { } else {
Tmp2 = MakeReg(MVT::i64); Tmp2 = MakeReg(MVT::i64);
@ -2288,13 +2303,15 @@ void AlphaISel::Select(SDOperand N) {
BuildMI(BB, Alpha::LDAHr, 2, Tmp2) BuildMI(BB, Alpha::LDAHr, 2, Tmp2)
.addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29); .addGlobalAddress(GASD->getGlobal()).addReg(Alpha::R29);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, GetRelVersion(Opc), 3).addReg(Tmp1) BuildMI(BB, GetRelVersion(Opc), 3).addReg(Tmp1)
.addGlobalAddress(GASD->getGlobal()).addReg(Tmp2); .addGlobalAddress(GASD->getGlobal()).addReg(Tmp2);
} }
} else if(Address.getOpcode() == ISD::FrameIndex) { } else if(Address.getOpcode() == ISD::FrameIndex) {
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 3).addReg(Tmp1) BuildMI(BB, Opc, 3).addReg(Tmp1)
.addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex()) .addFrameIndex(cast<FrameIndexSDNode>(Address)->getIndex())
.addReg(Alpha::F31); .addReg(Alpha::F31);
@ -2302,7 +2319,8 @@ void AlphaISel::Select(SDOperand N) {
long offset; long offset;
SelectAddr(Address, Tmp2, offset); SelectAddr(Address, Tmp2, offset);
if (EnableAlphaLSMark) if (EnableAlphaLSMark)
BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); BuildMI(BB, Alpha::MEMLABEL, 4).addImm(i).addImm(j).addImm(k)
.addImm(getUID());
BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2); BuildMI(BB, Opc, 3).addReg(Tmp1).addImm(offset).addReg(Tmp2);
} }
return; return;

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@ -31,7 +31,8 @@ def ADJUSTSTACKUP : PseudoInstAlpha<(ops ), "ADJUP">;
def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops ), "ADJDOWN">; def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops ), "ADJDOWN">;
def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n">; def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n">;
def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n">; def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n">;
def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k), "LSMARKER$$$i$$$j$$$k:\n">; def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m),
"LSMARKER$$$i$$$j$$$k$$$m:\n">;
//***************** //*****************
//These are shortcuts, the assembler expands them //These are shortcuts, the assembler expands them