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Allow virtreg redefines when verifying for RegAllocFast
llvm-svn: 103820
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@ -782,7 +782,7 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
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<< "********** Function: "
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<< ((Value*)Fn.getFunction())->getName() << '\n');
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if (VerifyFastRegalloc)
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Fn.verify();
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Fn.verify(this, true);
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MF = &Fn;
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MRI = &MF->getRegInfo();
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TM = &Fn.getTarget();
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