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[AArch64] make test immune to scalarization improvements; NFC

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This is explicitly implementing what the comment says rather
than relying on the implicit zext of a costant operand.

llvm-svn: 349166
This commit is contained in:
Sanjay Patel 2018-12-14 17:44:07 +00:00
parent fd70d7c7f5
commit 89e6221461
1 changed files with 6 additions and 5 deletions
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11
test/CodeGen/AArch64/aarch64-smull.ll
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@ -291,15 +291,16 @@ define <2 x i64> @umull_extvec_v2i32_v2i64(<2 x i32> %arg) nounwind {
ret <2 x i64> %tmp4
}
define i16 @smullWithInconsistentExtensions(<8 x i8> %vec) {
define i16 @smullWithInconsistentExtensions(<8 x i8> %x, <8 x i8> %y) {
; If one operand has a zero-extend and the other a sign-extend, smull
; cannot be used.
; CHECK-LABEL: smullWithInconsistentExtensions:
; CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
%1 = sext <8 x i8> %vec to <8 x i16>
%2 = mul <8 x i16> %1, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>
%3 = extractelement <8 x i16> %2, i32 0
ret i16 %3
%s = sext <8 x i8> %x to <8 x i16>
%z = zext <8 x i8> %y to <8 x i16>
%m = mul <8 x i16> %s, %z
%r = extractelement <8 x i16> %m, i32 0
ret i16 %r
}
define void @distribute(i16* %dst, i8* %src, i32 %mul) nounwind {