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[X86] Fix WriteMPSAD/WritePSADBW values to allow us to remove unnecessary instrw overrides.
llvm-svn: 330542
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@ -187,7 +187,7 @@ defm : BWWriteResPair<WriteShuffle, [BWPort5], 1>; // Vector shuffles.
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defm : BWWriteResPair<WriteVarShuffle, [BWPort5], 1>; // Vector variable shuffles.
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defm : BWWriteResPair<WriteBlend, [BWPort15], 1>; // Vector blends.
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defm : BWWriteResPair<WriteVarBlend, [BWPort5], 2, [2]>; // Vector variable blends.
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defm : BWWriteResPair<WriteMPSAD, [BWPort0, BWPort5], 6, [1, 2]>; // Vector MPSAD.
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defm : BWWriteResPair<WriteMPSAD, [BWPort0, BWPort5], 7, [1, 2], 3, 5>; // Vector MPSAD.
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defm : BWWriteResPair<WritePSADBW, [BWPort0], 5>; // Vector PSADBW.
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// Conversion between integer and float.
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@ -1335,13 +1335,6 @@ def: InstRW<[BWWriteResGroup77], (instregex "VBLENDPDYrmi",
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"VPORYrm",
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"VPXORYrm")>;
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def BWWriteResGroup78 : SchedWriteRes<[BWPort0,BWPort5]> {
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let Latency = 7;
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let NumMicroOps = 3;
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let ResourceCycles = [1,2];
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}
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def: InstRW<[BWWriteResGroup78], (instregex "(V?)MPSADBW(Y?)rri")>;
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def BWWriteResGroup79 : SchedWriteRes<[BWPort5,BWPort23]> {
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let Latency = 7;
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let NumMicroOps = 3;
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@ -1923,13 +1916,6 @@ def: InstRW<[BWWriteResGroup135], (instregex "ADD_FI16m",
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"VROUNDPDYm",
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"VROUNDPSYm")>;
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def BWWriteResGroup136 : SchedWriteRes<[BWPort0,BWPort5,BWPort23]> {
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let Latency = 12;
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let NumMicroOps = 4;
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let ResourceCycles = [1,2,1];
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}
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def: InstRW<[BWWriteResGroup136], (instregex "(V?)MPSADBWrmi")>;
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def BWWriteResGroup137 : SchedWriteRes<[BWPort0,BWFPDivider]> {
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let Latency = 11;
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let NumMicroOps = 1;
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@ -186,7 +186,7 @@ defm : HWWriteResPair<WriteShuffle256, [HWPort5], 3>;
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defm : HWWriteResPair<WriteVarShuffle256, [HWPort5], 3>;
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defm : HWWriteResPair<WriteVarBlend, [HWPort5], 2, [2]>;
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defm : HWWriteResPair<WriteVarVecShift, [HWPort0, HWPort5], 2, [2, 1]>;
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defm : HWWriteResPair<WriteMPSAD, [HWPort0, HWPort5], 6, [1, 2]>;
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defm : HWWriteResPair<WriteMPSAD, [HWPort0, HWPort5], 7, [1, 2], 3, 6>;
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defm : HWWriteResPair<WritePSADBW, [HWPort0], 5>;
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// String instructions.
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@ -2227,20 +2227,6 @@ def HWWriteResGroup109 : SchedWriteRes<[HWPort1,HWPort23,HWPort237,HWPort06,HWPo
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def: InstRW<[HWWriteResGroup109], (instregex "SHLD(16|32|64)mrCL",
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"SHRD(16|32|64)mrCL")>;
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def HWWriteResGroup112 : SchedWriteRes<[HWPort0,HWPort5]> {
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let Latency = 7;
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let NumMicroOps = 3;
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let ResourceCycles = [1,2];
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}
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def: InstRW<[HWWriteResGroup112], (instregex "(V?)MPSADBW(Y?)rri")>;
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def HWWriteResGroup113 : SchedWriteRes<[HWPort0,HWPort5,HWPort23]> {
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let Latency = 13;
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let NumMicroOps = 4;
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let ResourceCycles = [1,2,1];
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}
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def: InstRW<[HWWriteResGroup113], (instregex "(V?)MPSADBWrmi")>;
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def HWWriteResGroup113_1 : SchedWriteRes<[HWPort0,HWPort5,HWPort23]> {
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let Latency = 14;
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let NumMicroOps = 4;
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@ -170,7 +170,7 @@ defm : SBWriteResPair<WriteShuffle, [SBPort5], 1>;
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defm : SBWriteResPair<WriteVarShuffle, [SBPort15], 1>;
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defm : SBWriteResPair<WriteBlend, [SBPort15], 1>;
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defm : SBWriteResPair<WriteVarBlend, [SBPort1, SBPort5], 2>;
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defm : SBWriteResPair<WriteMPSAD, [SBPort0, SBPort15], 5, [1,2], 3>;
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defm : SBWriteResPair<WriteMPSAD, [SBPort0, SBPort15], 7, [1,2], 3, 6>;
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defm : SBWriteResPair<WritePSADBW, [SBPort0], 5>;
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////////////////////////////////////////////////////////////////////////////////
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@ -789,13 +789,6 @@ def SBWriteResGroup33 : SchedWriteRes<[SBPort4,SBPort23]> {
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def: InstRW<[SBWriteResGroup33], (instregex "PUSH64i8",
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"PUSH(16|32|64)r")>;
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def SBWriteResGroup34 : SchedWriteRes<[SBPort0,SBPort15]> {
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let Latency = 7;
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let NumMicroOps = 3;
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let ResourceCycles = [1,2];
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}
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def: InstRW<[SBWriteResGroup34], (instregex "(V?)MPSADBWrri")>;
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def SBWriteResGroup35 : SchedWriteRes<[SBPort1,SBPort5]> {
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let Latency = 5;
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let NumMicroOps = 3;
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@ -1649,13 +1642,6 @@ def: InstRW<[SBWriteResGroup107], (instregex "VCVTPD2DQYrm",
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"VCVTPD2PSYrm",
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"VCVTTPD2DQYrm")>;
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def SBWriteResGroup108 : SchedWriteRes<[SBPort0,SBPort23,SBPort15]> {
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let Latency = 13;
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let NumMicroOps = 4;
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let ResourceCycles = [1,1,2];
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}
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def: InstRW<[SBWriteResGroup108], (instregex "(V?)MPSADBWrmi")>;
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def SBWriteResGroup109 : SchedWriteRes<[SBPort1,SBPort5,SBPort23]> {
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let Latency = 11;
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let NumMicroOps = 4;
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@ -184,7 +184,7 @@ defm : SKLWriteResPair<WriteShuffle, [SKLPort5], 1>; // Vector shuffles.
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defm : SKLWriteResPair<WriteVarShuffle, [SKLPort5], 1>; // Vector shuffles.
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defm : SKLWriteResPair<WriteBlend, [SKLPort15], 1>; // Vector blends.
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defm : SKLWriteResPair<WriteVarBlend, [SKLPort5], 2, [2]>; // Vector variable blends.
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defm : SKLWriteResPair<WriteMPSAD, [SKLPort0, SKLPort5], 6, [1, 2]>; // Vector MPSAD.
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defm : SKLWriteResPair<WriteMPSAD, [SKLPort5], 4, [2], 2, 6>; // Vector MPSAD.
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defm : SKLWriteResPair<WritePSADBW, [SKLPort5], 3>; // Vector PSADBW.
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// Conversion between integer and float.
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@ -958,13 +958,6 @@ def: InstRW<[SKLWriteResGroup48], (instregex "(V?)ADDPD(Y?)rr",
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"(V?)SUBSDrr",
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"(V?)SUBSSrr")>;
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def SKLWriteResGroup50 : SchedWriteRes<[SKLPort5]> {
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let Latency = 4;
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let NumMicroOps = 2;
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let ResourceCycles = [2];
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}
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def: InstRW<[SKLWriteResGroup50], (instregex "(V?)MPSADBW(Y?)rri")>;
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def SKLWriteResGroup51 : SchedWriteRes<[SKLPort1,SKLPort5]> {
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let Latency = 4;
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let NumMicroOps = 2;
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@ -1993,13 +1986,6 @@ def: InstRW<[SKLWriteResGroup134], (instregex "(V?)ADDPDrm",
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def: InstRW<[SKLWriteResGroup134],
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(instregex "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)m")>;
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def SKLWriteResGroup137 : SchedWriteRes<[SKLPort5,SKLPort23]> {
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let Latency = 10;
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let NumMicroOps = 3;
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let ResourceCycles = [2,1];
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}
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def: InstRW<[SKLWriteResGroup137], (instregex "(V?)MPSADBWrmi")>;
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def SKLWriteResGroup138 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23]> {
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let Latency = 10;
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let NumMicroOps = 3;
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@ -184,8 +184,8 @@ defm : SKXWriteResPair<WriteShuffle, [SKXPort5], 1>; // Vector shuffles.
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defm : SKXWriteResPair<WriteVarShuffle, [SKXPort5], 1>; // Vector variable shuffles.
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defm : SKXWriteResPair<WriteBlend, [SKXPort15], 1>; // Vector blends.
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defm : SKXWriteResPair<WriteVarBlend, [SKXPort5], 2, [2]>; // Vector variable blends.
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defm : SKXWriteResPair<WriteMPSAD, [SKXPort0, SKXPort5], 6, [1, 2]>; // Vector MPSAD.
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defm : SKXWriteResPair<WritePSADBW, [SKXPort5], 3>; // Vector PSADBW.
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defm : SKXWriteResPair<WriteMPSAD, [SKXPort5], 4, [2], 2, 6>; // Vector MPSAD.
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defm : SKXWriteResPair<WritePSADBW, [SKXPort5], 3, [1,1], 1, 6>; // Vector PSADBW.
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// Conversion between integer and float.
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defm : SKXWriteResPair<WriteCvtF2I, [SKXPort1], 3>; // Float -> Integer.
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@ -1869,15 +1869,12 @@ def SKXWriteResGroup51 : SchedWriteRes<[SKXPort5]> {
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let NumMicroOps = 2;
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let ResourceCycles = [2];
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}
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def: InstRW<[SKXWriteResGroup51], (instregex "MPSADBWrri",
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"VEXPANDPDZ128rr",
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def: InstRW<[SKXWriteResGroup51], (instregex "VEXPANDPDZ128rr",
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"VEXPANDPDZ256rr",
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"VEXPANDPDZrr",
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"VEXPANDPSZ128rr",
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"VEXPANDPSZ256rr",
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"VEXPANDPSZrr",
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"VMPSADBWYrri",
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"VMPSADBWrri",
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"VPEXPANDDZ128rr",
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"VPEXPANDDZ256rr",
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"VPEXPANDDZrr",
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@ -3702,7 +3699,6 @@ def SKXWriteResGroup136 : SchedWriteRes<[SKXPort5,SKXPort23]> {
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let ResourceCycles = [1,1];
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}
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def: InstRW<[SKXWriteResGroup136], (instregex "PCMPGTQrm",
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"PSADBWrm",
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"VALIGNDZ128rm(b?)i",
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"VALIGNQZ128rm(b?)i",
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"VCMPPDZ128rm(b?)i",
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@ -3757,7 +3753,6 @@ def: InstRW<[SKXWriteResGroup136], (instregex "PCMPGTQrm",
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"VPMOVZXWDZ128rm(b?)",
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"VPMOVZXWQZ128rm(b?)",
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"VPSADBWZ128rm(b?)",
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"VPSADBWrm",
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"VPTESTMBZ128rm(b?)",
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"VPTESTMDZ128rm(b?)",
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"VPTESTMQZ128rm(b?)",
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@ -4179,10 +4174,8 @@ def SKXWriteResGroup151 : SchedWriteRes<[SKXPort5,SKXPort23]> {
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let NumMicroOps = 3;
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let ResourceCycles = [2,1];
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}
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def: InstRW<[SKXWriteResGroup151], (instregex "MPSADBWrmi",
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"VEXPANDPDZ128rm(b?)",
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def: InstRW<[SKXWriteResGroup151], (instregex "VEXPANDPDZ128rm(b?)",
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"VEXPANDPSZ128rm(b?)",
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"VMPSADBWrmi",
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"VPEXPANDDZ128rm(b?)",
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"VPEXPANDQZ128rm(b?)")>;
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@ -608,8 +608,8 @@ declare <4 x i64> @llvm.x86.avx2.movntdqa(i8*) nounwind readonly
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define <16 x i16> @test_mpsadbw(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> *%a2) {
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; GENERIC-LABEL: test_mpsadbw:
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; GENERIC: # %bb.0:
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; GENERIC-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
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; GENERIC-NEXT: vmpsadbw $7, (%rdi), %ymm0, %ymm0 # sched: [10:1.00]
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; GENERIC-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 # sched: [7:1.00]
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; GENERIC-NEXT: vmpsadbw $7, (%rdi), %ymm0, %ymm0 # sched: [13:1.00]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_mpsadbw:
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