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Use new MachineInstr mayLoadOrStore() API.
llvm-svn: 237965
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@ -48,7 +48,7 @@ static bool isFirstInstructionInSequence(MachineInstr *MI) {
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case AArch64::PRFUMi:
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return true;
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default:
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return (MI->mayLoad() || MI->mayStore());
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return MI->mayLoadOrStore();
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}
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}
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@ -617,10 +617,8 @@ AArch64InstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr *MIa,
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int OffsetA = 0, OffsetB = 0;
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int WidthA = 0, WidthB = 0;
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assert(MIa && (MIa->mayLoad() || MIa->mayStore()) &&
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"MIa must be a store or a load");
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assert(MIb && (MIb->mayLoad() || MIb->mayStore()) &&
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"MIb must be a store or a load");
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assert(MIa && MIa->mayLoadOrStore() && "MIa must be a load or store.");
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assert(MIb && MIb->mayLoadOrStore() && "MIb must be a load or store.");
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if (MIa->hasUnmodeledSideEffects() || MIb->hasUnmodeledSideEffects() ||
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MIa->hasOrderedMemoryRef() || MIb->hasOrderedMemoryRef())
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