From 8aaac91ca4fefa0c224f0650a3426dbe1bc39eb2 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sun, 31 Oct 2010 18:43:46 +0000
Subject: [PATCH] sketch out the planned instruction alias mechanism, add some
 comments about how the push/pop mnemonic aliases are wrong.

llvm-svn: 117857
---
 include/llvm/Target/Target.td  | 12 ++++++++++++
 lib/Target/X86/X86InstrInfo.td | 14 ++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 87faa6b7e24..57485602d7b 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -567,6 +567,18 @@ class MnemonicAlias<string From, string To> {
   list<Predicate> Predicates = [];
 }
 
+/// InstAlias - This defines an alternate assembly syntax that is allowed to
+/// match an instruction that has a different (more canonical) assembly
+/// representation.
+class InstAlias<dag Outs, dag Ins, string Asm, dag Result> {
+  dag OutOperandList = Outs;   // An dag containing the MI def operand list.
+  dag InOperandList = Ins;     // An dag containing the MI use operand list.
+  string AsmString = Asm;      // The .s format to match the instruction with.
+  dag ResultInst = Result;     // The MCInst to generate.
+  
+  // Predicates - Predicates that must be true for this to match.
+  list<Predicate> Predicates = [];
+}
 
 //===----------------------------------------------------------------------===//
 // AsmWriter - This class can be implemented by targets that need to customize
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 3af3911ef3f..ab9869abc5c 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1258,6 +1258,17 @@ include "X86InstrCompiler.td"
 // Assembler Aliases
 //===----------------------------------------------------------------------===//
 
+// movsx aliases
+def : InstAlias<(outs GR32:$dst), (ins GR8 :$src),
+                "movsx $src, $dst",
+                (MOVSX32rr8 GR32:$dst, GR8:$src)>;
+def : InstAlias<(outs GR32:$dst), (ins GR16:$src),
+                "movsx $src, $dst",
+                (MOVSX32rr16 GR32:$dst, GR16:$src)>;
+
+
+// TODO: lidtl/lidtq can be opcode aliases, perhaps others.
+
 def : MnemonicAlias<"iret", "iretl">;
 def : MnemonicAlias<"sysret", "sysretl">;
 def : MnemonicAlias<"cbw",  "cbtw">;
@@ -1272,6 +1283,9 @@ def : MnemonicAlias<"popf", "popfl">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"popf", "popfq">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"popfd",  "popfl">;
 
+// FIXME: This is wrong for "push reg".  "push %bx" should turn into pushw in
+// all modes.  However: "push (addr)" and "push $42" should default to
+// pushl/pushq depending on the current mode.  Similar for "pop %bx"
 def : MnemonicAlias<"push", "pushl">, Requires<[In32BitMode]>;
 def : MnemonicAlias<"push", "pushq">, Requires<[In64BitMode]>;
 def : MnemonicAlias<"pushf", "pushfl">, Requires<[In32BitMode]>;