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[CVP] Regenerate test checks (NFC)
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1eb8234c85
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@ -63,7 +63,7 @@ define i8 @test3(i8* %a) nounwind {
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; CHECK: bb:
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; CHECK-NEXT: ret i8 0
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; CHECK: bb2:
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; CHECK-NEXT: [[SHOULD_BE_CONST:%.*]] = load i8, i8* @gv
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; CHECK-NEXT: [[SHOULD_BE_CONST:%.*]] = load i8, i8* @gv, align 1
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; CHECK-NEXT: ret i8 [[SHOULD_BE_CONST]]
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;
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entry:
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@ -630,12 +630,12 @@ define void @abs1(i32 %a, i1* %p) {
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; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
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; CHECK-NEXT: store i1 true, i1* [[P]]
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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; CHECK-NEXT: store i1 true, i1* [[P]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]], align 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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@ -680,12 +680,12 @@ define void @abs2(i32 %a, i1* %p) {
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; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
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; CHECK-NEXT: store i1 true, i1* [[P]]
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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; CHECK-NEXT: store i1 true, i1* [[P]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]], align 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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@ -730,12 +730,12 @@ define void @nabs1(i32 %a, i1* %p) {
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; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
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; CHECK-NEXT: store i1 true, i1* [[P]]
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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; CHECK-NEXT: store i1 true, i1* [[P]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]], align 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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@ -780,12 +780,12 @@ define void @nabs2(i32 %a, i1* %p) {
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; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
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; CHECK-NEXT: br label [[SPLIT:%.*]]
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; CHECK: split:
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
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; CHECK-NEXT: store i1 true, i1* [[P:%.*]], align 1
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
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; CHECK-NEXT: store i1 true, i1* [[P]]
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; CHECK-NEXT: store i1 [[C2]], i1* [[P]], align 1
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; CHECK-NEXT: store i1 true, i1* [[P]], align 1
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; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
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; CHECK-NEXT: store i1 [[C4]], i1* [[P]], align 1
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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@ -16,10 +16,10 @@ define void @test1(i64 %tmp35) {
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; CHECK-NEXT: [[TMP36:%.*]] = icmp sgt i64 [[TMP35:%.*]], 0
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; CHECK-NEXT: br i1 [[TMP36]], label [[BB_TRUE:%.*]], label [[BB_FALSE:%.*]]
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; CHECK: bb_true:
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; CHECK-NEXT: tail call void @check1(i1 false) #0
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; CHECK-NEXT: tail call void @check1(i1 false) [[ATTR0:#.*]]
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; CHECK-NEXT: unreachable
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; CHECK: bb_false:
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; CHECK-NEXT: tail call void @check2(i1 true) #0
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; CHECK-NEXT: tail call void @check2(i1 true) [[ATTR0]]
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; CHECK-NEXT: unreachable
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;
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bb:
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@ -55,7 +55,7 @@ define void @test2(i64 %tmp35, i1 %inner_cmp) {
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; CHECK-NEXT: tail call void @check1(i1 false)
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; CHECK-NEXT: unreachable
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; CHECK: bb_false:
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; CHECK-NEXT: tail call void @check2(i1 true) #0
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; CHECK-NEXT: tail call void @check2(i1 true) [[ATTR0]]
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; CHECK-NEXT: unreachable
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;
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bb:
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@ -240,7 +240,7 @@ sw.default:
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define i1 @test8(i64* %p) {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !0
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, [[RNG0:!range !.*]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i64 [[A]], 0
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; CHECK-NEXT: ret i1 false
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;
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@ -251,7 +251,7 @@ define i1 @test8(i64* %p) {
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define i1 @test9(i64* %p) {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !1
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, [[RNG1:!range !.*]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i64 [[A]], 0
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; CHECK-NEXT: ret i1 true
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;
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@ -262,7 +262,7 @@ define i1 @test9(i64* %p) {
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define i1 @test10(i64* %p) {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, !range !2
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; CHECK-NEXT: [[A:%.*]] = load i64, i64* [[P:%.*]], align 4, [[RNG2:!range !.*]]
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; CHECK-NEXT: [[RES:%.*]] = icmp eq i64 [[A]], 0
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; CHECK-NEXT: ret i1 false
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;
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@ -275,7 +275,7 @@ define i1 @test10(i64* %p) {
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define i1 @test11() {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, !range !3
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; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, [[RNG3:!range !.*]]
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[POSITIVE]], 1
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; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[ADD]], 0
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; CHECK-NEXT: br label [[NEXT:%.*]]
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@ -657,7 +657,7 @@ else:
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@limit = external global i32
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define i1 @test15(i32 %a) {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: [[LIMIT:%.*]] = load i32, i32* @limit, align 4, !range !4
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; CHECK-NEXT: [[LIMIT:%.*]] = load i32, i32* @limit, align 4, [[RNG4:!range !.*]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], [[LIMIT]]
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; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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