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[NFC][test] Adding fastcc test case for promoted 16-bit integer bitcasts.

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The following: https://reviews.llvm.org/D82552

fixed an assert in the SelectionDag ISel legalizer for some CCs on armv7.

I noticed that this fix also fixes the assert when using fastcc, so I am
adding a fastcc regression test here.

Differential Revision: https://reviews.llvm.org/D82443
This commit is contained in:
Puyan Lotfi 2020-07-09 11:35:00 -07:00
parent c0a4a79579
commit 8ad0b9cbfb
1 changed files with 28 additions and 0 deletions
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28
test/CodeGen/ARM/arm-half-promote.ll
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@ -51,3 +51,31 @@ define swiftcc { <8 x half>, <8 x half> } @f2() {
; CHECK-NEXT: bx lr
ret { <8 x half>, <8 x half> } zeroinitializer
}
define fastcc { <8 x half>, <8 x half> } @f3() {
; CHECK-LABEL: _f3
; CHECK: vpush {d8}
; CHECK-NEXT: vmov.f64 d8, #5.000000e-01
; CHECK-NEXT: vmov.i32 d8, #0x0
; CHECK-NEXT: vmov.i32 d0, #0x0
; CHECK-NEXT: vmov.i32 d1, #0x0
; CHECK-NEXT: vmov.i32 d2, #0x0
; CHECK-NEXT: vmov.i32 d3, #0x0
; CHECK-NEXT: vmov.i32 d4, #0x0
; CHECK-NEXT: vmov.i32 d5, #0x0
; CHECK-NEXT: vmov.i32 d6, #0x0
; CHECK-NEXT: vmov.i32 d7, #0x0
; CHECK-NEXT: vmov.f32 s1, s16
; CHECK-NEXT: vmov.f32 s3, s16
; CHECK-NEXT: vmov.f32 s5, s16
; CHECK-NEXT: vmov.f32 s7, s16
; CHECK-NEXT: vmov.f32 s9, s16
; CHECK-NEXT: vmov.f32 s11, s16
; CHECK-NEXT: vmov.f32 s13, s16
; CHECK-NEXT: vmov.f32 s15, s16
; CHECK-NEXT: vpop {d8}
; CHECK-NEXT: bx lr
ret { <8 x half>, <8 x half> } zeroinitializer
}