From 8affd7c83b13429bbb2b30d1da5d3c24ef914f3b Mon Sep 17 00:00:00 2001
From: Balaram Makam <bmakam@codeaurora.org>
Date: Thu, 5 Oct 2017 18:33:34 +0000
Subject: [PATCH] [ARM/AARCH64] Make test MachineBranchProb.ll more robust and
 re-enable for ARM/AArch64

Summary: Make test robust enough to not fail due to CFG changes and re-enable for ARM/AArch64.

Reviewers: rovka, fhahn

Reviewed By: fhahn

Subscribers: fhahn, aemerson, rengolin, mcrosier, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D38590

llvm-svn: 315002
---
 test/CodeGen/Generic/MachineBranchProb.ll | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/test/CodeGen/Generic/MachineBranchProb.ll b/test/CodeGen/Generic/MachineBranchProb.ll
index 36844658096..8207fa8ce0f 100644
--- a/test/CodeGen/Generic/MachineBranchProb.ll
+++ b/test/CodeGen/Generic/MachineBranchProb.ll
@@ -1,8 +1,5 @@
 ; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s
 
-; ARM & AArch64 run an extra SimplifyCFG which disrupts this test.
-; UNSUPPORTED: arm,aarch64
-
 ; Hexagon runs passes that renumber the basic blocks, causing this test
 ; to fail.
 ; XFAIL: hexagon
@@ -10,6 +7,8 @@
 ; Bug: PR31899
 ; XFAIL: avr
 
+declare void @foo()
+
 ; Make sure we have the correct weight attached to each successor.
 define i32 @test2(i32 %x) nounwind uwtable readnone ssp {
 ; CHECK-LABEL: Machine code for function test2:
@@ -29,6 +28,8 @@ entry:
 ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%)
 
 sw.bb:
+; this call will prevent simplifyCFG from optimizing the block away in ARM/AArch64.
+  tail call void @foo()
   br label %return
 
 sw.bb1: