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[DAGCombiner] Don't fold zext_vector_inreg/sext_vector_inreg(undef) to undef. Fold to 0.
zext_vector_inreg needs to produces 0s in the extended bits and sext_vector_inreg needs to produce upper bits that are all the same. So we should fold them to a 0 vector instead of undef. Fixes PR46585.
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@ -11086,8 +11086,9 @@ SDValue DAGCombiner::visitSIGN_EXTEND_VECTOR_INREG(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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EVT VT = N->getValueType(0);
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// sext_vector_inreg(undef) = 0 because the top bit will all be the same.
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if (N0.isUndef())
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return DAG.getUNDEF(VT);
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return DAG.getConstant(0, SDLoc(N), VT);
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if (SDValue Res = tryToFoldExtendOfConstant(N, TLI, DAG, LegalTypes))
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return Res;
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@ -11102,8 +11103,9 @@ SDValue DAGCombiner::visitZERO_EXTEND_VECTOR_INREG(SDNode *N) {
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SDValue N0 = N->getOperand(0);
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EVT VT = N->getValueType(0);
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// zext_vector_inreg(undef) = 0 because the top bits will be zero.
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if (N0.isUndef())
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return DAG.getUNDEF(VT);
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return DAG.getConstant(0, SDLoc(N), VT);
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if (SDValue Res = tryToFoldExtendOfConstant(N, TLI, DAG, LegalTypes))
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return Res;
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@ -7,7 +7,7 @@
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define void @spam() local_unnamed_addr {
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; CHECK-LABEL: spam:
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; CHECK: ## %bb.0: ## %bb
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; CHECK-NEXT: pmovmskb %xmm0, %eax
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: je LBB0_2
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; CHECK-NEXT: ## %bb.1: ## %bb9
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