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Fix warning, the better way. Really, this is what this instruction is for, so use it
llvm-svn: 24486
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5de23ee89a
commit
8b7596a557
@ -280,7 +280,7 @@ static unsigned GetRelVersion(unsigned opcode)
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void AlphaISel::MoveFP2Int(unsigned src, unsigned dst, bool isDouble)
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{
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unsigned Opc;
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unsigned Opc = Alpha::WTF;
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if (TLI.getTargetMachine().getSubtarget<AlphaSubtarget>().hasF2I()) {
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Opc = isDouble ? Alpha::FTOIT : Alpha::FTOIS;
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BuildMI(BB, Opc, 1, dst).addReg(src).addReg(Alpha::F31);
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@ -307,7 +307,7 @@ void AlphaISel::MoveFP2Int(unsigned src, unsigned dst, bool isDouble)
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void AlphaISel::MoveInt2FP(unsigned src, unsigned dst, bool isDouble)
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{
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unsigned Opc;
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unsigned Opc = Alpha::WTF;
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if (TLI.getTargetMachine().getSubtarget<AlphaSubtarget>().hasF2I()) {
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Opc = isDouble?Alpha::ITOFT:Alpha::ITOFS;
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BuildMI(BB, Opc, 1, dst).addReg(src).addReg(Alpha::R31);
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@ -335,7 +335,7 @@ void AlphaISel::MoveInt2FP(unsigned src, unsigned dst, bool isDouble)
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bool AlphaISel::SelectFPSetCC(SDOperand N, unsigned dst)
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{
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SDNode *SetCC = N.Val;
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unsigned Opc, Tmp1, Tmp2, Tmp3;
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unsigned Tmp1, Tmp2, Tmp3, Opc = Alpha::WTF;
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ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
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bool rev = false;
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bool inv = false;
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@ -1581,7 +1581,7 @@ unsigned AlphaISel::SelectExpr(SDOperand N) {
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}
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void AlphaISel::Select(SDOperand N) {
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unsigned Tmp1, Tmp2, Opc;
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unsigned Tmp1, Tmp2, Opc = Alpha::WTF;
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unsigned opcode = N.getOpcode();
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if (!ExprMap.insert(std::make_pair(N, notIn)).second)
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@ -1616,7 +1616,7 @@ void AlphaISel::Select(SDOperand N) {
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case MVT::f32: Opc = Alpha::IDEF_F32; break;
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case MVT::f64: Opc = Alpha::IDEF_F64; break;
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case MVT::i64: Opc = Alpha::IDEF_I; break;
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default: Opc = 0; assert(0 && "should have been legalized");
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default: assert(0 && "should have been legalized");
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};
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BuildMI(BB, Opc, 0,
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cast<RegisterSDNode>(N.getOperand(1))->getReg());
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@ -1702,14 +1702,14 @@ void AlphaISel::Select(SDOperand N) {
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if (opcode == ISD::STORE) {
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switch(Value.getValueType()) {
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default: Opc = 0; assert(0 && "unknown Type in store");
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default: assert(0 && "unknown Type in store");
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case MVT::i64: Opc = Alpha::STQ; break;
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case MVT::f64: Opc = Alpha::STT; break;
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case MVT::f32: Opc = Alpha::STS; break;
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}
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} else { //ISD::TRUNCSTORE
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switch(cast<VTSDNode>(Node->getOperand(4))->getVT()) {
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default: Opc = 0; assert(0 && "unknown Type in store");
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default: assert(0 && "unknown Type in store");
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case MVT::i8: Opc = Alpha::STB; break;
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case MVT::i16: Opc = Alpha::STW; break;
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case MVT::i32: Opc = Alpha::STL; break;
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