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Reapply [InstCombine] Fold multiuse shr eq zero
This was reverted due to performance regressions in ARM benchmarks, which have since been addressed by D101196 (SCEV analysis improvement) and D101778 (CGP reverse transform). ----- The single-use case is handled implicity by converting the icmp into a mask check first. When comparing with zero in particular, we don't need the one-use restriction, as we only produce a single icmp. https://alive2.llvm.org/ce/z/MSixcm https://alive2.llvm.org/ce/z/GwpG0M
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@ -2280,6 +2280,16 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
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if (Shr->isExact())
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return new ICmpInst(Pred, X, ConstantInt::get(ShrTy, C << ShAmtVal));
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if (C.isNullValue()) {
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// == 0 is u< 1.
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if (Pred == CmpInst::ICMP_EQ)
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return new ICmpInst(CmpInst::ICMP_ULT, X,
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ConstantInt::get(ShrTy, (C + 1).shl(ShAmtVal)));
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else
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return new ICmpInst(CmpInst::ICMP_UGT, X,
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ConstantInt::get(ShrTy, (C + 1).shl(ShAmtVal) - 1));
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}
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if (Shr->hasOneUse()) {
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// Canonicalize the shift into an 'and':
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// icmp eq/ne (shr X, ShAmt), C --> icmp eq/ne (and X, HiMask), (C << ShAmt)
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@ -875,7 +875,7 @@ define i1 @lshr_eq_0_multiuse(i8 %x) {
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; CHECK-LABEL: @lshr_eq_0_multiuse(
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; CHECK-NEXT: [[S:%.*]] = lshr i8 [[X:%.*]], 2
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; CHECK-NEXT: call void @use(i8 [[S]])
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; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[S]], 0
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; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X]], 4
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; CHECK-NEXT: ret i1 [[C]]
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;
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%s = lshr i8 %x, 2
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@ -888,7 +888,7 @@ define i1 @lshr_ne_0_multiuse(i8 %x) {
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; CHECK-LABEL: @lshr_ne_0_multiuse(
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; CHECK-NEXT: [[S:%.*]] = lshr i8 [[X:%.*]], 2
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; CHECK-NEXT: call void @use(i8 [[S]])
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; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[S]], 0
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X]], 3
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; CHECK-NEXT: ret i1 [[C]]
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;
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%s = lshr i8 %x, 2
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@ -901,7 +901,7 @@ define i1 @ashr_eq_0_multiuse(i8 %x) {
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; CHECK-LABEL: @ashr_eq_0_multiuse(
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; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
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; CHECK-NEXT: call void @use(i8 [[S]])
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; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[S]], 0
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; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[X]], 4
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; CHECK-NEXT: ret i1 [[C]]
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;
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%s = ashr i8 %x, 2
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@ -914,7 +914,7 @@ define i1 @ashr_ne_0_multiuse(i8 %x) {
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; CHECK-LABEL: @ashr_ne_0_multiuse(
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; CHECK-NEXT: [[S:%.*]] = ashr i8 [[X:%.*]], 2
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; CHECK-NEXT: call void @use(i8 [[S]])
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; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[S]], 0
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; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 [[X]], 3
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; CHECK-NEXT: ret i1 [[C]]
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;
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%s = ashr i8 %x, 2
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@ -2,7 +2,7 @@
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; RUN: opt -instcombine -S < %s | FileCheck %s
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; Test that presence of range does not cause unprofitable transforms with bit
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; arithmetics, and instcombine behaves exactly the same as without the range.
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; arithmetics.
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define i1 @without_range(i32* %A) {
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; CHECK-LABEL: @without_range(
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@ -18,9 +18,8 @@ define i1 @without_range(i32* %A) {
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define i1 @with_range(i32* %A) {
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; CHECK-LABEL: @with_range(
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; CHECK-NEXT: [[A_VAL:%.*]] = load i32, i32* [[A:%.*]], align 8, !range !0
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; CHECK-NEXT: [[B_MASK:%.*]] = and i32 [[A_VAL]], 2147483646
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; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[B_MASK]], 0
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; CHECK-NEXT: [[A_VAL:%.*]] = load i32, i32* [[A:%.*]], align 8, !range [[RNG0:![0-9]+]]
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; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A_VAL]], 2
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; CHECK-NEXT: ret i1 [[C]]
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;
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%A.val = load i32, i32* %A, align 8, !range !0
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@ -32,7 +32,7 @@ define i32 @ctlz_loop_with_abs(i32 %n) {
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; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[WHILE_BODY_PREHEADER]] ]
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; CHECK-NEXT: [[TMP1]] = lshr i32 [[N_ADDR_03]], 1
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_02]], 1
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[TMP1]], 0
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; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp ult i32 [[N_ADDR_03]], 2
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; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[WHILE_END]], label [[WHILE_BODY]]
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; CHECK: while.end:
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; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC]], [[WHILE_BODY]] ]
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