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[PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed"

The assertion is everzealous and fail tests like:

  renamable $x3 = LI8 0
  STD renamable $x3, 16, $x1
  renamable $x3 = LI8 0

Remove the assertion since killed flag of $x3 is not mandentory.

Differential Revision: https://reviews.llvm.org/D68344

llvm-svn: 374515
This commit is contained in:
Yi-Hong Lyu 2019-10-11 05:32:29 +00:00
parent 0ead3f1cb2
commit 8c808d7fc1
2 changed files with 31 additions and 8 deletions

View File

@ -117,8 +117,6 @@ namespace {
if (!AfterBBI->modifiesRegister(Reg, TRI))
continue;
assert(DeadOrKillToUnset &&
"Shouldn't overwrite a register before it is killed");
// Finish scanning because Reg is overwritten by a non-load
// instruction.
if (AfterBBI->getOpcode() != Opc)
@ -134,12 +132,15 @@ namespace {
// It loads same immediate value to the same Reg, which is redundant.
// We would unset kill flag in previous Reg usage to extend live range
// of Reg first, then remove the redundancy.
LLVM_DEBUG(dbgs() << " Unset dead/kill flag of " << *DeadOrKillToUnset
<< " from " << *DeadOrKillToUnset->getParent());
if (DeadOrKillToUnset->isDef())
DeadOrKillToUnset->setIsDead(false);
else
DeadOrKillToUnset->setIsKill(false);
if (DeadOrKillToUnset) {
LLVM_DEBUG(dbgs()
<< " Unset dead/kill flag of " << *DeadOrKillToUnset
<< " from " << *DeadOrKillToUnset->getParent());
if (DeadOrKillToUnset->isDef())
DeadOrKillToUnset->setIsDead(false);
else
DeadOrKillToUnset->setIsKill(false);
}
DeadOrKillToUnset =
AfterBBI->findRegisterDefOperand(Reg, true, true, TRI);
if (DeadOrKillToUnset)

View File

@ -346,3 +346,25 @@ body: |
BLR8 implicit $lr8, implicit $rm
...
---
name: overwrite_reg_before_killed
alignment: 16
tracksRegLiveness: true
machineFunctionInfo: {}
body: |
bb.0.entry:
liveins: $x1
; CHECK-LABEL: name: overwrite_reg_before_killed
; CHECK: liveins: $x1
; CHECK: renamable $x3 = LI8 0
; CHECK: STD renamable $x3, 16, $x1
; CHECK: STD killed renamable $x3, 8, $x1
; CHECK: BLR8 implicit $lr8, implicit $rm
renamable $x3 = LI8 0
STD renamable $x3, 16, $x1
renamable $x3 = LI8 0
STD killed renamable $x3, 8, $x1
BLR8 implicit $lr8, implicit $rm
...