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[PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed"
The assertion is everzealous and fail tests like: renamable $x3 = LI8 0 STD renamable $x3, 16, $x1 renamable $x3 = LI8 0 Remove the assertion since killed flag of $x3 is not mandentory. Differential Revision: https://reviews.llvm.org/D68344 llvm-svn: 374515
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@ -117,8 +117,6 @@ namespace {
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if (!AfterBBI->modifiesRegister(Reg, TRI))
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if (!AfterBBI->modifiesRegister(Reg, TRI))
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continue;
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continue;
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assert(DeadOrKillToUnset &&
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"Shouldn't overwrite a register before it is killed");
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// Finish scanning because Reg is overwritten by a non-load
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// Finish scanning because Reg is overwritten by a non-load
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// instruction.
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// instruction.
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if (AfterBBI->getOpcode() != Opc)
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if (AfterBBI->getOpcode() != Opc)
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@ -134,12 +132,15 @@ namespace {
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// It loads same immediate value to the same Reg, which is redundant.
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// It loads same immediate value to the same Reg, which is redundant.
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// We would unset kill flag in previous Reg usage to extend live range
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// We would unset kill flag in previous Reg usage to extend live range
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// of Reg first, then remove the redundancy.
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// of Reg first, then remove the redundancy.
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LLVM_DEBUG(dbgs() << " Unset dead/kill flag of " << *DeadOrKillToUnset
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if (DeadOrKillToUnset) {
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<< " from " << *DeadOrKillToUnset->getParent());
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LLVM_DEBUG(dbgs()
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if (DeadOrKillToUnset->isDef())
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<< " Unset dead/kill flag of " << *DeadOrKillToUnset
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DeadOrKillToUnset->setIsDead(false);
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<< " from " << *DeadOrKillToUnset->getParent());
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else
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if (DeadOrKillToUnset->isDef())
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DeadOrKillToUnset->setIsKill(false);
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DeadOrKillToUnset->setIsDead(false);
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else
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DeadOrKillToUnset->setIsKill(false);
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}
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DeadOrKillToUnset =
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DeadOrKillToUnset =
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AfterBBI->findRegisterDefOperand(Reg, true, true, TRI);
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AfterBBI->findRegisterDefOperand(Reg, true, true, TRI);
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if (DeadOrKillToUnset)
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if (DeadOrKillToUnset)
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@ -346,3 +346,25 @@ body: |
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BLR8 implicit $lr8, implicit $rm
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BLR8 implicit $lr8, implicit $rm
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...
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...
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---
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name: overwrite_reg_before_killed
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alignment: 16
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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liveins: $x1
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; CHECK-LABEL: name: overwrite_reg_before_killed
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; CHECK: liveins: $x1
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; CHECK: renamable $x3 = LI8 0
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; CHECK: STD renamable $x3, 16, $x1
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; CHECK: STD killed renamable $x3, 8, $x1
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; CHECK: BLR8 implicit $lr8, implicit $rm
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renamable $x3 = LI8 0
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STD renamable $x3, 16, $x1
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renamable $x3 = LI8 0
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STD killed renamable $x3, 8, $x1
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BLR8 implicit $lr8, implicit $rm
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...
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