From 8ca47825f7e1ea8e1ef069e70acea3b9cd66adaf Mon Sep 17 00:00:00 2001 From: Eugene Zelenko Date: Mon, 9 Jan 2017 22:16:51 +0000 Subject: [PATCH] [NVPTX] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). llvm-svn: 291490 --- lib/Target/NVPTX/ManagedStringPool.h | 7 +- lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 152 ++++++++++++++--------- lib/Target/NVPTX/NVPTXAsmPrinter.h | 58 ++++++--- lib/Target/NVPTX/NVPTXISelLowering.cpp | 118 ++++++++++-------- lib/Target/NVPTX/NVPTXInstrInfo.td | 2 +- lib/Target/NVPTX/NVPTXSection.h | 10 +- lib/Target/NVPTX/NVPTXTargetMachine.cpp | 37 +++--- lib/Target/NVPTX/NVPTXTargetObjectFile.h | 10 +- 8 files changed, 227 insertions(+), 167 deletions(-) diff --git a/lib/Target/NVPTX/ManagedStringPool.h b/lib/Target/NVPTX/ManagedStringPool.h index a2d670f8d39..7fc0156216f 100644 --- a/lib/Target/NVPTX/ManagedStringPool.h +++ b/lib/Target/NVPTX/ManagedStringPool.h @@ -27,7 +27,8 @@ class ManagedStringPool { SmallVector Pool; public: - ManagedStringPool() {} + ManagedStringPool() = default; + ~ManagedStringPool() { SmallVectorImpl::iterator Current = Pool.begin(); while (Current != Pool.end()) { @@ -43,6 +44,6 @@ public: } }; -} +} // end namespace llvm -#endif +#endif // LLVM_LIB_TARGET_NVPTX_MANAGEDSTRINGPOOL_H diff --git a/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/lib/Target/NVPTX/NVPTXAsmPrinter.cpp index 04c8d5c0443..3c2594c77f4 100644 --- a/lib/Target/NVPTX/NVPTXAsmPrinter.cpp +++ b/lib/Target/NVPTX/NVPTXAsmPrinter.cpp @@ -12,42 +12,83 @@ // //===----------------------------------------------------------------------===// -#include "NVPTXAsmPrinter.h" #include "InstPrinter/NVPTXInstPrinter.h" +#include "MCTargetDesc/NVPTXBaseInfo.h" #include "MCTargetDesc/NVPTXMCAsmInfo.h" #include "NVPTX.h" -#include "NVPTXInstrInfo.h" +#include "NVPTXAsmPrinter.h" #include "NVPTXMCExpr.h" #include "NVPTXMachineFunctionInfo.h" #include "NVPTXRegisterInfo.h" +#include "NVPTXSubtarget.h" #include "NVPTXTargetMachine.h" #include "NVPTXUtilities.h" #include "cl_common_defines.h" +#include "llvm/ADT/APFloat.h" +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Triple.h" +#include "llvm/ADT/Twine.h" #include "llvm/Analysis/ConstantFolding.h" #include "llvm/CodeGen/Analysis.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" #include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/MachineValueType.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/BasicBlock.h" +#include "llvm/IR/Constant.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/DataLayout.h" #include "llvm/IR/DebugInfo.h" +#include "llvm/IR/DebugInfoMetadata.h" +#include "llvm/IR/DebugLoc.h" #include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Function.h" +#include "llvm/IR/GlobalValue.h" #include "llvm/IR/GlobalVariable.h" -#include "llvm/IR/Mangler.h" +#include "llvm/IR/Instruction.h" +#include "llvm/IR/LLVMContext.h" #include "llvm/IR/Module.h" #include "llvm/IR/Operator.h" +#include "llvm/IR/Type.h" +#include "llvm/IR/User.h" +#include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" +#include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/FormattedStream.h" #include "llvm/Support/Path.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/Support/TargetRegistry.h" +#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Transforms/Utils/UnrollLoop.h" +#include +#include +#include +#include #include +#include +#include +#include + using namespace llvm; #define DEPOTNAME "__local_depot" @@ -62,11 +103,11 @@ InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore, cl::Hidden, cl::desc("NVPTX Specific: Emit source line in ptx file"), cl::init(false)); -namespace { /// DiscoverDependentGlobals - Return a set of GlobalVariables on which \p V /// depends. -void DiscoverDependentGlobals(const Value *V, - DenseSet &Globals) { +static void +DiscoverDependentGlobals(const Value *V, + DenseSet &Globals) { if (const GlobalVariable *GV = dyn_cast(V)) Globals.insert(GV); else { @@ -80,11 +121,12 @@ void DiscoverDependentGlobals(const Value *V, /// VisitGlobalVariableForEmission - Add \p GV to the list of GlobalVariable /// instances to be emitted, but only after any dependents have been added -/// first. -void VisitGlobalVariableForEmission( - const GlobalVariable *GV, SmallVectorImpl &Order, - DenseSet &Visited, - DenseSet &Visiting) { +/// first.s +static void +VisitGlobalVariableForEmission(const GlobalVariable *GV, + SmallVectorImpl &Order, + DenseSet &Visited, + DenseSet &Visiting) { // Have we already visited this one? if (Visited.count(GV)) return; @@ -108,7 +150,6 @@ void VisitGlobalVariableForEmission( Visited.insert(GV); Visiting.erase(GV); } -} void NVPTXAsmPrinter::emitLineNumberAsDotLoc(const MachineInstr &MI) { if (!EmitLineNumbers) @@ -369,7 +410,7 @@ void NVPTXAsmPrinter::printReturnValStr(const Function *F, raw_ostream &O) { } else if (Ty->isAggregateType() || Ty->isVectorTy()) { unsigned totalsz = DL.getTypeAllocSize(Ty); unsigned retAlignment = 0; - if (!llvm::getAlign(*F, 0, retAlignment)) + if (!getAlign(*F, 0, retAlignment)) retAlignment = DL.getABITypeAlignment(Ty); O << ".param .align " << retAlignment << " .b8 func_retval0[" << totalsz << "]"; @@ -401,7 +442,6 @@ void NVPTXAsmPrinter::printReturnValStr(const Function *F, raw_ostream &O) { } } O << ") "; - return; } void NVPTXAsmPrinter::printReturnValStr(const MachineFunction &MF, @@ -459,7 +499,7 @@ void NVPTXAsmPrinter::EmitFunctionEntryLabel() { MRI = &MF->getRegInfo(); F = MF->getFunction(); emitLinkageDirective(F, O); - if (llvm::isKernelFunction(*F)) + if (isKernelFunction(*F)) O << ".entry "; else { O << ".func "; @@ -470,7 +510,7 @@ void NVPTXAsmPrinter::EmitFunctionEntryLabel() { emitFunctionParamList(*MF, O); - if (llvm::isKernelFunction(*F)) + if (isKernelFunction(*F)) emitKernelFunctionDirectives(*F, O); OutStreamer->EmitRawText(O.str()); @@ -513,15 +553,15 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const Function &F, // If none of reqntid* is specified, don't output reqntid directive. unsigned reqntidx, reqntidy, reqntidz; bool specified = false; - if (!llvm::getReqNTIDx(F, reqntidx)) + if (!getReqNTIDx(F, reqntidx)) reqntidx = 1; else specified = true; - if (!llvm::getReqNTIDy(F, reqntidy)) + if (!getReqNTIDy(F, reqntidy)) reqntidy = 1; else specified = true; - if (!llvm::getReqNTIDz(F, reqntidz)) + if (!getReqNTIDz(F, reqntidz)) reqntidz = 1; else specified = true; @@ -535,15 +575,15 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const Function &F, // If none of maxntid* is specified, don't output maxntid directive. unsigned maxntidx, maxntidy, maxntidz; specified = false; - if (!llvm::getMaxNTIDx(F, maxntidx)) + if (!getMaxNTIDx(F, maxntidx)) maxntidx = 1; else specified = true; - if (!llvm::getMaxNTIDy(F, maxntidy)) + if (!getMaxNTIDy(F, maxntidy)) maxntidy = 1; else specified = true; - if (!llvm::getMaxNTIDz(F, maxntidz)) + if (!getMaxNTIDz(F, maxntidz)) maxntidz = 1; else specified = true; @@ -553,11 +593,11 @@ void NVPTXAsmPrinter::emitKernelFunctionDirectives(const Function &F, << "\n"; unsigned mincta; - if (llvm::getMinCTASm(F, mincta)) + if (getMinCTASm(F, mincta)) O << ".minnctapersm " << mincta << "\n"; unsigned maxnreg; - if (llvm::getMaxNReg(F, maxnreg)) + if (getMaxNReg(F, maxnreg)) O << ".maxnreg " << maxnreg << "\n"; } @@ -617,12 +657,9 @@ void NVPTXAsmPrinter::printVecModifiedImmediate( llvm_unreachable("Unknown Modifier on immediate operand"); } - - void NVPTXAsmPrinter::emitDeclaration(const Function *F, raw_ostream &O) { - emitLinkageDirective(F, O); - if (llvm::isKernelFunction(*F)) + if (isKernelFunction(*F)) O << ".entry "; else O << ".func "; @@ -684,7 +721,7 @@ static bool canDemoteGlobalVar(const GlobalVariable *gv, Function const *&f) { if (!gv->hasInternalLinkage()) return false; PointerType *Pty = gv->getType(); - if (Pty->getAddressSpace() != llvm::ADDRESS_SPACE_SHARED) + if (Pty->getAddressSpace() != ADDRESS_SPACE_SHARED) return false; const Function *oneFunc = nullptr; @@ -699,7 +736,7 @@ static bool canDemoteGlobalVar(const GlobalVariable *gv, Function const *&f) { } static bool useFuncSeen(const Constant *C, - llvm::DenseMap &seenMap) { + DenseMap &seenMap) { for (const User *U : C->users()) { if (const Constant *cu = dyn_cast(U)) { if (useFuncSeen(cu, seenMap)) @@ -719,7 +756,7 @@ static bool useFuncSeen(const Constant *C, } void NVPTXAsmPrinter::emitDeclarations(const Module &M, raw_ostream &O) { - llvm::DenseMap seenMap; + DenseMap seenMap; for (Module::const_iterator FI = M.begin(), FE = M.end(); FI != FE; ++FI) { const Function *F = &*FI; @@ -1040,7 +1077,6 @@ void NVPTXAsmPrinter::emitLinkageDirective(const GlobalValue *V, void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, raw_ostream &O, bool processDemoted) { - // Skip meta data if (GVar->hasSection()) { if (GVar->getSection() == "llvm.metadata") @@ -1069,13 +1105,13 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, O << ".weak "; } - if (llvm::isTexture(*GVar)) { - O << ".global .texref " << llvm::getTextureName(*GVar) << ";\n"; + if (isTexture(*GVar)) { + O << ".global .texref " << getTextureName(*GVar) << ";\n"; return; } - if (llvm::isSurface(*GVar)) { - O << ".global .surfref " << llvm::getSurfaceName(*GVar) << ";\n"; + if (isSurface(*GVar)) { + O << ".global .surfref " << getSurfaceName(*GVar) << ";\n"; return; } @@ -1088,8 +1124,8 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, return; } - if (llvm::isSampler(*GVar)) { - O << ".global .samplerref " << llvm::getSamplerName(*GVar); + if (isSampler(*GVar)) { + O << ".global .samplerref " << getSamplerName(*GVar); const Constant *Initializer = nullptr; if (GVar->hasInitializer()) @@ -1150,12 +1186,11 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, } if (GVar->hasPrivateLinkage()) { - - if (!strncmp(GVar->getName().data(), "unrollpragma", 12)) + if (strncmp(GVar->getName().data(), "unrollpragma", 12) == 0) return; // FIXME - need better way (e.g. Metadata) to avoid generating this global - if (!strncmp(GVar->getName().data(), "filename", 8)) + if (strncmp(GVar->getName().data(), "filename", 8) == 0) return; if (GVar->use_empty()) return; @@ -1199,8 +1234,8 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, // Ptx allows variable initilization only for constant and global state // spaces. if (GVar->hasInitializer()) { - if ((PTy->getAddressSpace() == llvm::ADDRESS_SPACE_GLOBAL) || - (PTy->getAddressSpace() == llvm::ADDRESS_SPACE_CONST)) { + if ((PTy->getAddressSpace() == ADDRESS_SPACE_GLOBAL) || + (PTy->getAddressSpace() == ADDRESS_SPACE_CONST)) { const Constant *Initializer = GVar->getInitializer(); // 'undef' is treated as there is no value specified. if (!Initializer->isNullValue() && !isa(Initializer)) { @@ -1233,8 +1268,8 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, ElementSize = DL.getTypeStoreSize(ETy); // Ptx allows variable initilization only for constant and // global state spaces. - if (((PTy->getAddressSpace() == llvm::ADDRESS_SPACE_GLOBAL) || - (PTy->getAddressSpace() == llvm::ADDRESS_SPACE_CONST)) && + if (((PTy->getAddressSpace() == ADDRESS_SPACE_GLOBAL) || + (PTy->getAddressSpace() == ADDRESS_SPACE_CONST)) && GVar->hasInitializer()) { const Constant *Initializer = GVar->getInitializer(); if (!isa(Initializer) && !Initializer->isNullValue()) { @@ -1285,7 +1320,6 @@ void NVPTXAsmPrinter::printModuleLevelGV(const GlobalVariable *GVar, default: llvm_unreachable("type not supported yet"); } - } O << ";\n"; } @@ -1305,16 +1339,16 @@ void NVPTXAsmPrinter::emitDemotedVars(const Function *f, raw_ostream &O) { void NVPTXAsmPrinter::emitPTXAddressSpace(unsigned int AddressSpace, raw_ostream &O) const { switch (AddressSpace) { - case llvm::ADDRESS_SPACE_LOCAL: + case ADDRESS_SPACE_LOCAL: O << "local"; break; - case llvm::ADDRESS_SPACE_GLOBAL: + case ADDRESS_SPACE_GLOBAL: O << "global"; break; - case llvm::ADDRESS_SPACE_CONST: + case ADDRESS_SPACE_CONST: O << "const"; break; - case llvm::ADDRESS_SPACE_SHARED: + case ADDRESS_SPACE_SHARED: O << "shared"; break; default: @@ -1363,7 +1397,6 @@ NVPTXAsmPrinter::getPTXFundamentalTypeStr(Type *Ty, bool useB4PTR) const { void NVPTXAsmPrinter::emitPTXGlobalVariable(const GlobalVariable *GVar, raw_ostream &O) { - const DataLayout &DL = getDataLayout(); // GlobalVariables are always constant pointers themselves. @@ -1406,7 +1439,6 @@ void NVPTXAsmPrinter::emitPTXGlobalVariable(const GlobalVariable *GVar, default: llvm_unreachable("type not supported yet"); } - return; } static unsigned int getOpenCLAlignment(const DataLayout &DL, Type *Ty) { @@ -1450,7 +1482,7 @@ void NVPTXAsmPrinter::emitFunctionParamList(const Function *F, raw_ostream &O) { Function::const_arg_iterator I, E; unsigned paramIndex = 0; bool first = true; - bool isKernelFunc = llvm::isKernelFunction(*F); + bool isKernelFunc = isKernelFunction(*F); bool isABI = (nvptxSubtarget->getSmVersion() >= 20); MVT thePointerTy = TLI->getPointerTy(DL); @@ -1533,13 +1565,13 @@ void NVPTXAsmPrinter::emitFunctionParamList(const Function *F, raw_ostream &O) { default: O << ".ptr "; break; - case llvm::ADDRESS_SPACE_CONST: + case ADDRESS_SPACE_CONST: O << ".ptr .const "; break; - case llvm::ADDRESS_SPACE_SHARED: + case ADDRESS_SPACE_SHARED: O << ".ptr .shared "; break; - case llvm::ADDRESS_SPACE_GLOBAL: + case ADDRESS_SPACE_GLOBAL: O << ".ptr .global "; break; } @@ -1820,7 +1852,6 @@ static void ConvertDoubleToBytes(unsigned char *p, double val) { void NVPTXAsmPrinter::bufferLEByte(const Constant *CPV, int Bytes, AggBuffer *aggBuffer) { - const DataLayout &DL = getDataLayout(); if (isa(CPV) || CPV->isNullValue()) { @@ -1985,7 +2016,6 @@ void NVPTXAsmPrinter::bufferAggregateConstant(const Constant *CPV, // buildTypeNameMap - Run through symbol table looking for type names. // - bool NVPTXAsmPrinter::ignoreLoc(const MachineInstr &MI) { switch (MI.getOpcode()) { default: @@ -2100,7 +2130,7 @@ NVPTXAsmPrinter::lowerConstantForGV(const Constant *CV, bool ProcessingGeneric) raw_string_ostream OS(S); OS << "Unsupported expression in static initializer: "; CE->printAsOperand(OS, /*PrintType=*/ false, - !MF ? 0 : MF->getFunction()->getParent()); + !MF ? nullptr : MF->getFunction()->getParent()); report_fatal_error(OS.str()); } @@ -2330,7 +2360,7 @@ void NVPTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier) { printOperand(MI, opNum, O); - if (Modifier && !strcmp(Modifier, "add")) { + if (Modifier && strcmp(Modifier, "add") == 0) { O << ", "; printOperand(MI, opNum + 1, O); } else { diff --git a/lib/Target/NVPTX/NVPTXAsmPrinter.h b/lib/Target/NVPTX/NVPTXAsmPrinter.h index 3dcc0e358a1..8ec3476b871 100644 --- a/lib/Target/NVPTX/NVPTXAsmPrinter.h +++ b/lib/Target/NVPTX/NVPTXAsmPrinter.h @@ -1,4 +1,4 @@ -//===-- NVPTXAsmPrinter.h - NVPTX LLVM assembly writer --------------------===// +//===-- NVPTXAsmPrinter.h - NVPTX LLVM assembly writer ----------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -18,17 +18,34 @@ #include "NVPTX.h" #include "NVPTXSubtarget.h" #include "NVPTXTargetMachine.h" -#include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" #include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineLoopInfo.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/DebugLoc.h" +#include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Function.h" -#include "llvm/MC/MCAsmInfo.h" +#include "llvm/IR/GlobalValue.h" +#include "llvm/IR/Value.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" -#include "llvm/Support/FormattedStream.h" +#include "llvm/PassAnalysisSupport.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetMachine.h" +#include +#include #include +#include +#include +#include +#include // The ptx syntax and format is very different from that usually seem in a .s // file, @@ -40,7 +57,8 @@ // (subclass of MCStreamer). namespace llvm { - class MCOperand; + +class MCOperand; class LineReader { private: @@ -49,14 +67,17 @@ private: char buff[512]; std::string theFileName; SmallVector lineOffset; + public: LineReader(std::string filename) { theCurLine = 0; fstr.open(filename.c_str()); theFileName = filename; } - std::string fileName() { return theFileName; } + ~LineReader() { fstr.close(); } + + std::string fileName() { return theFileName; } std::string readLine(unsigned line); }; @@ -107,6 +128,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter { numSymbols = 0; EmitGeneric = AP.EmitGeneric; } + unsigned addBytes(unsigned char *Ptr, int Num, int Bytes) { assert((curpos + Num) <= size); assert((curpos + Bytes) <= size); @@ -120,6 +142,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter { } return curpos; } + unsigned addZeros(int Num) { assert((curpos + Num) <= size); for (int i = 0; i < Num; ++i) { @@ -128,12 +151,14 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter { } return curpos; } + void addSymbol(const Value *GVar, const Value *GVarBeforeStripping) { symbolPosInBuffer.push_back(curpos); Symbols.push_back(GVar); SymbolsBeforeStripping.push_back(GVarBeforeStripping); numSymbols++; } + void print() { if (numSymbols == 0) { // print out in bytes @@ -267,7 +292,7 @@ private: std::map TypeNameMap; // List of variables demoted to a function scope. - std::map > localDecls; + std::map> localDecls; // To record filename to ID mapping std::map filenameMap; @@ -292,7 +317,8 @@ private: bool isLoopHeaderOfNoUnroll(const MachineBasicBlock &MBB) const; - LineReader *reader; + LineReader *reader = nullptr; + LineReader *getReader(const std::string &); // Used to control the need to emit .generic() in the initializer of @@ -312,20 +338,17 @@ public: NVPTXAsmPrinter(TargetMachine &TM, std::unique_ptr Streamer) : AsmPrinter(TM, std::move(Streamer)), EmitGeneric(static_cast(TM).getDrvInterface() == - NVPTX::CUDA) { - CurrentBankselLabelInBasicBlock = ""; - reader = nullptr; - } + NVPTX::CUDA) {} - ~NVPTXAsmPrinter() { - if (!reader) - delete reader; + ~NVPTXAsmPrinter() override { + delete reader; } bool runOnMachineFunction(MachineFunction &F) override { nvptxSubtarget = &F.getSubtarget(); return AsmPrinter::runOnMachineFunction(F); } + void getAnalysisUsage(AnalysisUsage &AU) const override { AU.addRequired(); AsmPrinter::getAnalysisUsage(AU); @@ -338,6 +361,7 @@ public: DebugLoc prevDebugLoc; void emitLineNumberAsDotLoc(const MachineInstr &); }; -} // end of namespace -#endif +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_NVPTX_NVPTXASMPRINTER_H diff --git a/lib/Target/NVPTX/NVPTXISelLowering.cpp b/lib/Target/NVPTX/NVPTXISelLowering.cpp index 2e4764feff1..7a760fd38d0 100644 --- a/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -1,3 +1,4 @@ +//===-- NVPTXISelLowering.cpp - NVPTX DAG Lowering Implementation ---------===// // // The LLVM Compiler Infrastructure // @@ -11,31 +12,55 @@ // //===----------------------------------------------------------------------===// -#include "NVPTXISelLowering.h" +#include "MCTargetDesc/NVPTXBaseInfo.h" #include "NVPTX.h" +#include "NVPTXISelLowering.h" +#include "NVPTXSection.h" +#include "NVPTXSubtarget.h" #include "NVPTXTargetMachine.h" #include "NVPTXTargetObjectFile.h" #include "NVPTXUtilities.h" +#include "llvm/ADT/APInt.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/ADT/StringRef.h" #include "llvm/CodeGen/Analysis.h" -#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" +#include "llvm/CodeGen/MachineMemOperand.h" +#include "llvm/CodeGen/MachineValueType.h" +#include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/IR/Argument.h" +#include "llvm/IR/Attributes.h" #include "llvm/IR/CallSite.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/DataLayout.h" #include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Function.h" #include "llvm/IR/GlobalValue.h" -#include "llvm/IR/IntrinsicInst.h" -#include "llvm/IR/Intrinsics.h" +#include "llvm/IR/Instruction.h" +#include "llvm/IR/Instructions.h" #include "llvm/IR/Module.h" -#include "llvm/MC/MCSectionELF.h" +#include "llvm/IR/Type.h" +#include "llvm/IR/Value.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CodeGen.h" #include "llvm/Support/CommandLine.h" -#include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetCallingConv.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetOptions.h" +#include +#include +#include +#include #include +#include +#include +#include #undef DEBUG_TYPE #define DEBUG_TYPE "nvptx-lower" @@ -109,7 +134,6 @@ static void ComputePTXValueVTs(const TargetLowering &TLI, const DataLayout &DL, NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM, const NVPTXSubtarget &STI) : TargetLowering(TM), nvTM(&TM), STI(STI) { - // always lower memset, memcpy, and memmove intrinsics to load/store // instructions, rather // then generating calls to memset, mempcy or memmove. @@ -981,7 +1005,7 @@ std::string NVPTXTargetLowering::getPrototype( unsigned align = 0; const CallInst *CallI = cast(CS->getInstruction()); // +1 because index 0 is reserved for return type alignment - if (!llvm::getAlign(*CallI, i + 1, align)) + if (!getAlign(*CallI, i + 1, align)) align = DL.getABITypeAlignment(Ty); unsigned sz = DL.getTypeAllocSize(Ty); O << ".param .align " << align << " .b8 "; @@ -1047,7 +1071,7 @@ unsigned NVPTXTargetLowering::getArgumentAlignment(SDValue Callee, // With bitcast'd call targets, the instruction will be the call if (isa(CalleeI)) { // Check if we have call alignment metadata - if (llvm::getAlign(*cast(CalleeI), Idx, Align)) + if (getAlign(*cast(CalleeI), Idx, Align)) return Align; const Value *CalleeV = cast(CalleeI)->getCalledValue(); @@ -1070,7 +1094,7 @@ unsigned NVPTXTargetLowering::getArgumentAlignment(SDValue Callee, // Check for function alignment information if we found that the // ultimate target is a Function if (DirectCallee) - if (llvm::getAlign(*cast(DirectCallee), Idx, Align)) + if (getAlign(*cast(DirectCallee), Idx, Align)) return Align; // Call is indirect or alignment information is not available, fall back to @@ -1747,7 +1771,6 @@ SDValue NVPTXTargetLowering::LowerShiftRightParts(SDValue Op, unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; if (VTBits == 32 && STI.getSmVersion() >= 35) { - // For 32bit and sm35, we can use the funnel shift 'shf' instruction. // {dHi, dLo} = {aHi, aLo} >> Amt // dHi = aHi >> Amt @@ -1761,7 +1784,6 @@ SDValue NVPTXTargetLowering::LowerShiftRightParts(SDValue Op, return DAG.getMergeValues(Ops, dl); } else { - // {dHi, dLo} = {aHi, aLo} >> Amt // - if (Amt>=size) then // dLo = aHi >> (Amt-size) @@ -1809,7 +1831,6 @@ SDValue NVPTXTargetLowering::LowerShiftLeftParts(SDValue Op, SDValue ShAmt = Op.getOperand(2); if (VTBits == 32 && STI.getSmVersion() >= 35) { - // For 32bit and sm35, we can use the funnel shift 'shf' instruction. // {dHi, dLo} = {aHi, aLo} << Amt // dHi = shf.l.clamp aLo, aHi, Amt @@ -1823,7 +1844,6 @@ SDValue NVPTXTargetLowering::LowerShiftLeftParts(SDValue Op, return DAG.getMergeValues(Ops, dl); } else { - // {dHi, dLo} = {aHi, aLo} << Amt // - if (Amt>=size) then // dLo = aLo << Amt (all 0) @@ -2002,11 +2022,10 @@ NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const { case 2: Opcode = NVPTXISD::StoreV2; break; - case 4: { + case 4: Opcode = NVPTXISD::StoreV4; break; } - } SmallVector Ops; @@ -2140,7 +2159,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( theArgs[i], (theArgs[i]->getParent() ? theArgs[i]->getParent()->getParent() : nullptr))) { - assert(llvm::isKernelFunction(*F) && + assert(isKernelFunction(*F) && "Only kernels can have image/sampler params"); InVals.push_back(DAG.getConstant(i + 1, dl, MVT::i32)); continue; @@ -2193,7 +2212,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( 0); assert(vtparts.size() > 0 && "empty aggregate type not expected"); bool aggregateIsPacked = false; - if (StructType *STy = llvm::dyn_cast(Ty)) + if (StructType *STy = dyn_cast(Ty)) aggregateIsPacked = STy->isPacked(); SDValue Arg = getParamSymbol(DAG, idx, PtrVT); @@ -2202,7 +2221,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( EVT partVT = vtparts[parti]; Value *srcValue = Constant::getNullValue( PointerType::get(partVT.getTypeForEVT(F->getContext()), - llvm::ADDRESS_SPACE_PARAM)); + ADDRESS_SPACE_PARAM)); SDValue srcAddr = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, DAG.getConstant(offsets[parti], dl, PtrVT)); @@ -2242,7 +2261,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( if (NumElts == 1) { // We only have one element, so just directly load it Value *SrcValue = Constant::getNullValue(PointerType::get( - EltVT.getTypeForEVT(F->getContext()), llvm::ADDRESS_SPACE_PARAM)); + EltVT.getTypeForEVT(F->getContext()), ADDRESS_SPACE_PARAM)); SDValue P = DAG.getLoad( EltVT, dl, Root, Arg, MachinePointerInfo(SrcValue), DL.getABITypeAlignment(EltVT.getTypeForEVT(F->getContext())), @@ -2260,7 +2279,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( // f32,f32 = load ... EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, 2); Value *SrcValue = Constant::getNullValue(PointerType::get( - VecVT.getTypeForEVT(F->getContext()), llvm::ADDRESS_SPACE_PARAM)); + VecVT.getTypeForEVT(F->getContext()), ADDRESS_SPACE_PARAM)); SDValue P = DAG.getLoad( VecVT, dl, Root, Arg, MachinePointerInfo(SrcValue), DL.getABITypeAlignment(VecVT.getTypeForEVT(F->getContext())), @@ -2301,7 +2320,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( for (unsigned i = 0; i < NumElts; i += VecSize) { Value *SrcValue = Constant::getNullValue( PointerType::get(VecVT.getTypeForEVT(F->getContext()), - llvm::ADDRESS_SPACE_PARAM)); + ADDRESS_SPACE_PARAM)); SDValue SrcAddr = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, DAG.getConstant(Ofst, dl, PtrVT)); SDValue P = DAG.getLoad( @@ -2335,7 +2354,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments( // If ABI, load from the param symbol SDValue Arg = getParamSymbol(DAG, idx, PtrVT); Value *srcValue = Constant::getNullValue(PointerType::get( - ObjectVT.getTypeForEVT(F->getContext()), llvm::ADDRESS_SPACE_PARAM)); + ObjectVT.getTypeForEVT(F->getContext()), ADDRESS_SPACE_PARAM)); SDValue p; if (ObjectVT.getSizeInBits() < Ins[InsIdx].VT.getSizeInBits()) { ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? @@ -2424,7 +2443,6 @@ NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, Chain = DAG.getMemIntrinsicNode(NVPTXISD::StoreRetval, dl, DAG.getVTList(MVT::Other), Ops, EltVT, MachinePointerInfo()); - } else if (NumElts == 2) { // V2 store SDValue StoreVal0 = OutVals[0]; @@ -2558,7 +2576,6 @@ NVPTXTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, return DAG.getNode(NVPTXISD::RET_FLAG, dl, MVT::Other, Chain); } - void NVPTXTargetLowering::LowerAsmOperandForConstraint( SDValue Op, std::string &Constraint, std::vector &Ops, SelectionDAG &DAG) const { @@ -3306,7 +3323,7 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( Info.memVT = getValueType(DL, I.getType()); Info.ptrVal = I.getArgOperand(0); Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = true; Info.align = 0; @@ -3326,7 +3343,7 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( Info.memVT = getValueType(DL, I.getType()); Info.ptrVal = I.getArgOperand(0); Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = cast(I.getArgOperand(1))->getZExtValue(); @@ -3347,7 +3364,7 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( Info.memVT = getValueType(DL, I.getType()); Info.ptrVal = I.getArgOperand(0); Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = cast(I.getArgOperand(1))->getZExtValue(); @@ -3410,17 +3427,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_tld4_unified_r_2d_v4f32_f32: case Intrinsic::nvvm_tld4_unified_g_2d_v4f32_f32: case Intrinsic::nvvm_tld4_unified_b_2d_v4f32_f32: - case Intrinsic::nvvm_tld4_unified_a_2d_v4f32_f32: { + case Intrinsic::nvvm_tld4_unified_a_2d_v4f32_f32: Info.opc = getOpcForTextureInstr(Intrinsic); Info.memVT = MVT::v4f32; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; - } + case Intrinsic::nvvm_tex_1d_v4s32_s32: case Intrinsic::nvvm_tex_1d_v4s32_f32: case Intrinsic::nvvm_tex_1d_level_v4s32_f32: @@ -3532,17 +3549,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_tld4_unified_r_2d_v4u32_f32: case Intrinsic::nvvm_tld4_unified_g_2d_v4u32_f32: case Intrinsic::nvvm_tld4_unified_b_2d_v4u32_f32: - case Intrinsic::nvvm_tld4_unified_a_2d_v4u32_f32: { + case Intrinsic::nvvm_tld4_unified_a_2d_v4u32_f32: Info.opc = getOpcForTextureInstr(Intrinsic); Info.memVT = MVT::v4i32; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; - } + case Intrinsic::nvvm_suld_1d_i8_clamp: case Intrinsic::nvvm_suld_1d_v2i8_clamp: case Intrinsic::nvvm_suld_1d_v4i8_clamp: @@ -3587,17 +3604,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_suld_2d_array_v4i8_zero: case Intrinsic::nvvm_suld_3d_i8_zero: case Intrinsic::nvvm_suld_3d_v2i8_zero: - case Intrinsic::nvvm_suld_3d_v4i8_zero: { + case Intrinsic::nvvm_suld_3d_v4i8_zero: Info.opc = getOpcForSurfaceInstr(Intrinsic); Info.memVT = MVT::i8; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; - } + case Intrinsic::nvvm_suld_1d_i16_clamp: case Intrinsic::nvvm_suld_1d_v2i16_clamp: case Intrinsic::nvvm_suld_1d_v4i16_clamp: @@ -3642,17 +3659,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_suld_2d_array_v4i16_zero: case Intrinsic::nvvm_suld_3d_i16_zero: case Intrinsic::nvvm_suld_3d_v2i16_zero: - case Intrinsic::nvvm_suld_3d_v4i16_zero: { + case Intrinsic::nvvm_suld_3d_v4i16_zero: Info.opc = getOpcForSurfaceInstr(Intrinsic); Info.memVT = MVT::i16; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; - } + case Intrinsic::nvvm_suld_1d_i32_clamp: case Intrinsic::nvvm_suld_1d_v2i32_clamp: case Intrinsic::nvvm_suld_1d_v4i32_clamp: @@ -3697,17 +3714,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_suld_2d_array_v4i32_zero: case Intrinsic::nvvm_suld_3d_i32_zero: case Intrinsic::nvvm_suld_3d_v2i32_zero: - case Intrinsic::nvvm_suld_3d_v4i32_zero: { + case Intrinsic::nvvm_suld_3d_v4i32_zero: Info.opc = getOpcForSurfaceInstr(Intrinsic); Info.memVT = MVT::i32; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; - } + case Intrinsic::nvvm_suld_1d_i64_clamp: case Intrinsic::nvvm_suld_1d_v2i64_clamp: case Intrinsic::nvvm_suld_1d_array_i64_clamp: @@ -3737,18 +3754,17 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( case Intrinsic::nvvm_suld_2d_array_i64_zero: case Intrinsic::nvvm_suld_2d_array_v2i64_zero: case Intrinsic::nvvm_suld_3d_i64_zero: - case Intrinsic::nvvm_suld_3d_v2i64_zero: { + case Intrinsic::nvvm_suld_3d_v2i64_zero: Info.opc = getOpcForSurfaceInstr(Intrinsic); Info.memVT = MVT::i64; Info.ptrVal = nullptr; Info.offset = 0; - Info.vol = 0; + Info.vol = false; Info.readMem = true; Info.writeMem = false; Info.align = 16; return true; } - } return false; } @@ -3760,7 +3776,6 @@ bool NVPTXTargetLowering::getTgtMemIntrinsic( bool NVPTXTargetLowering::isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS) const { - // AddrMode - This represents an addressing mode of: // BaseGV + BaseOffs + BaseReg + Scale*ScaleReg // @@ -4059,7 +4074,7 @@ static SDValue PerformANDCombine(SDNode *N, } bool AddTo = false; - if (AExt.getNode() != 0) { + if (AExt.getNode() != nullptr) { // Re-insert the ext as a zext. Val = DCI.DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), AExt.getValueType(), Val); @@ -4204,7 +4219,6 @@ static bool IsMulWideOperandDemotable(SDValue Op, static bool AreMulWideOperandsDemotable(SDValue LHS, SDValue RHS, unsigned OptSize, bool &IsSigned) { - OperandSignedness LHSSign; // The LHS operand must be a demotable op diff --git a/lib/Target/NVPTX/NVPTXInstrInfo.td b/lib/Target/NVPTX/NVPTXInstrInfo.td index 92a88c7f250..0fbb0448e4c 100644 --- a/lib/Target/NVPTX/NVPTXInstrInfo.td +++ b/lib/Target/NVPTX/NVPTXInstrInfo.td @@ -144,7 +144,7 @@ def do_SQRTF32_RN : Predicate<"usePrecSqrtF32()">; def hasHWROT32 : Predicate<"Subtarget->hasHWROT32()">; def noHWROT32 : Predicate<"!Subtarget->hasHWROT32()">; -def true : Predicate<"1">; +def true : Predicate<"true">; def hasPTX31 : Predicate<"Subtarget->getPTXVersion() >= 31">; diff --git a/lib/Target/NVPTX/NVPTXSection.h b/lib/Target/NVPTX/NVPTXSection.h index cad4f5668fd..b0472de980f 100644 --- a/lib/Target/NVPTX/NVPTXSection.h +++ b/lib/Target/NVPTX/NVPTXSection.h @@ -1,4 +1,4 @@ -//===- NVPTXSection.h - NVPTX-specific section representation -*- C++ -*-===// +//===- NVPTXSection.h - NVPTX-specific section representation ---*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -14,18 +14,20 @@ #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H #define LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H -#include "llvm/IR/GlobalVariable.h" #include "llvm/MC/MCSection.h" +#include "llvm/MC/SectionKind.h" namespace llvm { + /// Represents a section in PTX PTX does not have sections. We create this class /// in order to use the ASMPrint interface. /// class NVPTXSection final : public MCSection { virtual void anchor(); + public: NVPTXSection(SectionVariant V, SectionKind K) : MCSection(V, K, nullptr) {} - ~NVPTXSection() {} + ~NVPTXSection() = default; /// Override this as NVPTX has its own way of printing switching /// to a section. @@ -40,4 +42,4 @@ public: } // end namespace llvm -#endif +#endif // LLVM_LIB_TARGET_NVPTX_NVPTXSECTION_H diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 6c68a2c9370..eb357e0a4d5 100644 --- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -11,41 +11,28 @@ // //===----------------------------------------------------------------------===// -#include "NVPTXTargetMachine.h" -#include "MCTargetDesc/NVPTXMCAsmInfo.h" #include "NVPTX.h" #include "NVPTXAllocaHoisting.h" #include "NVPTXLowerAggrCopies.h" +#include "NVPTXTargetMachine.h" #include "NVPTXTargetObjectFile.h" #include "NVPTXTargetTransformInfo.h" -#include "llvm/Analysis/Passes.h" -#include "llvm/CodeGen/AsmPrinter.h" -#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetPassConfig.h" -#include "llvm/IR/DataLayout.h" -#include "llvm/IR/IRPrintingPasses.h" #include "llvm/IR/LegacyPassManager.h" -#include "llvm/IR/Verifier.h" -#include "llvm/MC/MCAsmInfo.h" -#include "llvm/MC/MCInstrInfo.h" -#include "llvm/MC/MCStreamer.h" -#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Pass.h" #include "llvm/Support/CommandLine.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/FormattedStream.h" #include "llvm/Support/TargetRegistry.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Target/TargetLowering.h" -#include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" -#include "llvm/Target/TargetRegisterInfo.h" -#include "llvm/Target/TargetSubtargetInfo.h" #include "llvm/Transforms/Scalar.h" #include "llvm/Transforms/Scalar/GVN.h" #include "llvm/Transforms/Vectorize.h" +#include +#include using namespace llvm; @@ -57,6 +44,7 @@ static cl::opt cl::init(false), cl::Hidden); namespace llvm { + void initializeNVVMIntrRangePass(PassRegistry&); void initializeNVVMReflectPass(PassRegistry&); void initializeGenericToNVVMPass(PassRegistry&); @@ -66,7 +54,8 @@ void initializeNVPTXInferAddressSpacesPass(PassRegistry &); void initializeNVPTXLowerAggrCopiesPass(PassRegistry &); void initializeNVPTXLowerArgsPass(PassRegistry &); void initializeNVPTXLowerAllocaPass(PassRegistry &); -} + +} // end namespace llvm extern "C" void LLVMInitializeNVPTXTarget() { // Register the target. @@ -109,7 +98,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT, : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, Reloc::PIC_, CM, OL), is64bit(is64bit), - TLOF(make_unique()), + TLOF(llvm::make_unique()), Subtarget(TT, CPU, FS, *this) { if (TT.getOS() == Triple::NVCL) drvInterface = NVPTX::NVCL; @@ -118,7 +107,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT, initAsmInfo(); } -NVPTXTargetMachine::~NVPTXTargetMachine() {} +NVPTXTargetMachine::~NVPTXTargetMachine() = default; void NVPTXTargetMachine32::anchor() {} @@ -141,6 +130,7 @@ NVPTXTargetMachine64::NVPTXTargetMachine64(const Target &T, const Triple &TT, : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} namespace { + class NVPTXPassConfig : public TargetPassConfig { public: NVPTXPassConfig(NVPTXTargetMachine *TM, PassManagerBase &PM) @@ -170,6 +160,7 @@ private: // Add passes that perform straight-line scalar optimizations. void addStraightLineScalarOptimizationPasses(); }; + } // end anonymous namespace TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) { diff --git a/lib/Target/NVPTX/NVPTXTargetObjectFile.h b/lib/Target/NVPTX/NVPTXTargetObjectFile.h index dc367a90594..69c59d0296a 100644 --- a/lib/Target/NVPTX/NVPTXTargetObjectFile.h +++ b/lib/Target/NVPTX/NVPTXTargetObjectFile.h @@ -11,14 +11,13 @@ #define LLVM_LIB_TARGET_NVPTX_NVPTXTARGETOBJECTFILE_H #include "NVPTXSection.h" +#include "llvm/MC/MCSection.h" +#include "llvm/MC/SectionKind.h" #include "llvm/Target/TargetLoweringObjectFile.h" namespace llvm { -class GlobalVariable; -class Module; class NVPTXTargetObjectFile : public TargetLoweringObjectFile { - public: NVPTXTargetObjectFile() { TextSection = nullptr; @@ -43,7 +42,7 @@ public: DwarfMacinfoSection = nullptr; } - virtual ~NVPTXTargetObjectFile(); + ~NVPTXTargetObjectFile() override; void Initialize(MCContext &ctx, const TargetMachine &TM) override { TargetLoweringObjectFile::Initialize(ctx, TM); @@ -52,7 +51,6 @@ public: BSSSection = new NVPTXSection(MCSection::SV_ELF, SectionKind::getBSS()); ReadOnlySection = new NVPTXSection(MCSection::SV_ELF, SectionKind::getReadOnly()); - StaticCtorSection = new NVPTXSection(MCSection::SV_ELF, SectionKind::getMetadata()); StaticDtorSection = @@ -102,4 +100,4 @@ public: } // end namespace llvm -#endif +#endif // LLVM_LIB_TARGET_NVPTX_NVPTXTARGETOBJECTFILE_H