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GlobalISel: Legalization for inttoptr/ptrtoint

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llvm-svn: 352973
This commit is contained in:
Matt Arsenault 2019-02-02 23:29:55 +00:00
parent d63611fc73
commit 8cef0be33e
6 changed files with 410 additions and 33 deletions
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2
include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
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@ -221,6 +221,8 @@ LegalityPredicate widerThan(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar whose size is not a power of
/// 2.
LegalityPredicate sizeNotPow2(unsigned TypeIdx);
/// True iff the specified type indices are both the same bit size.
LegalityPredicate sameSize(unsigned TypeIdx0, unsigned TypeIdx1);
/// True iff the specified MMO index has a size that is not a power of 2
LegalityPredicate memSizeInBytesNotPow2(unsigned MMOIdx);
/// True iff the specified type index is a vector whose element count is not a

8
lib/CodeGen/GlobalISel/LegalityPredicates.cpp
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@ -99,6 +99,14 @@ LegalityPredicate LegalityPredicates::sizeNotPow2(unsigned TypeIdx) {
};
}
LegalityPredicate LegalityPredicates::sameSize(unsigned TypeIdx0,
unsigned TypeIdx1) {
return [=](const LegalityQuery &Query) {
return Query.Types[TypeIdx0].getSizeInBits() ==
Query.Types[TypeIdx1].getSizeInBits();
};
}
LegalityPredicate LegalityPredicates::memSizeInBytesNotPow2(unsigned MMOIdx) {
return [=](const LegalityQuery &Query) {
return !isPowerOf2_32(Query.MMODescrs[MMOIdx].SizeInBits / 8);

42
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
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@ -879,6 +879,22 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
if (TypeIdx != 0)
return UnableToLegalize; // TODO
Observer.changingInstr(MI);
narrowScalarDst(MI, NarrowTy, 0, TargetOpcode::G_ZEXT);
Observer.changedInstr(MI);
return Legalized;
case TargetOpcode::G_INTTOPTR:
if (TypeIdx != 1)
return UnableToLegalize;
Observer.changingInstr(MI);
narrowScalarSrc(MI, NarrowTy, 1);
Observer.changedInstr(MI);
return Legalized;
case TargetOpcode::G_PTRTOINT:
if (TypeIdx != 0)
return UnableToLegalize;
Observer.changingInstr(MI);
narrowScalarDst(MI, NarrowTy, 0, TargetOpcode::G_ZEXT);
Observer.changedInstr(MI);
@ -1351,6 +1367,22 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
Observer.changedInstr(MI);
return Legalized;
case TargetOpcode::G_INTTOPTR:
if (TypeIdx != 1)
return UnableToLegalize;
Observer.changingInstr(MI);
widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
Observer.changedInstr(MI);
return Legalized;
case TargetOpcode::G_PTRTOINT:
if (TypeIdx != 0)
return UnableToLegalize;
Observer.changingInstr(MI);
widenScalarDst(MI, WideTy, 0);
Observer.changedInstr(MI);
return Legalized;
}
}
@ -1722,16 +1754,16 @@ LegalizerHelper::fewerElementsVectorCasts(MachineInstr &MI, unsigned TypeIdx,
LLT NarrowTy1;
unsigned NumParts;
if (NarrowTy.isScalar()) {
NumParts = DstTy.getNumElements();
NarrowTy1 = SrcTy.getElementType();
} else {
if (NarrowTy.isVector()) {
// Uneven breakdown not handled.
NumParts = DstTy.getNumElements() / NarrowTy.getNumElements();
if (NumParts * NarrowTy.getNumElements() != DstTy.getNumElements())
return UnableToLegalize;
NarrowTy1 = LLT::vector(NumParts, SrcTy.getElementType().getSizeInBits());
} else {
NumParts = DstTy.getNumElements();
NarrowTy1 = SrcTy.getElementType();
}
SmallVector<unsigned, 4> SrcRegs, DstRegs;
@ -2057,6 +2089,8 @@ LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
case G_UITOFP:
case G_FPTOSI:
case G_FPTOUI:
case G_INTTOPTR:
case G_PTRTOINT:
return fewerElementsVectorCasts(MI, TypeIdx, NarrowTy);
case G_ICMP:
case G_FCMP:

50
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
View File

@ -227,15 +227,52 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
.scalarize(0);
auto smallerThan = [](unsigned TypeIdx0, unsigned TypeIdx1) {
return [=](const LegalityQuery &Query) {
return Query.Types[TypeIdx0].getSizeInBits() <
Query.Types[TypeIdx1].getSizeInBits();
};
};
auto greaterThan = [](unsigned TypeIdx0, unsigned TypeIdx1) {
return [=](const LegalityQuery &Query) {
return Query.Types[TypeIdx0].getSizeInBits() >
Query.Types[TypeIdx1].getSizeInBits();
};
};
getActionDefinitionsBuilder(G_INTTOPTR)
.legalIf([](const LegalityQuery &Query) {
return true;
});
// List the common cases
.legalForCartesianProduct({GlobalPtr, ConstantPtr, FlatPtr}, {S64})
.legalForCartesianProduct({LocalPtr, PrivatePtr}, {S32})
.scalarize(0)
// Accept any address space as long as the size matches
.legalIf(sameSize(0, 1))
.widenScalarIf(smallerThan(1, 0),
[](const LegalityQuery &Query) {
return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits()));
})
.narrowScalarIf(greaterThan(1, 0),
[](const LegalityQuery &Query) {
return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits()));
});
getActionDefinitionsBuilder(G_PTRTOINT)
.legalIf([](const LegalityQuery &Query) {
return true;
});
// List the common cases
.legalForCartesianProduct({GlobalPtr, ConstantPtr, FlatPtr}, {S64})
.legalForCartesianProduct({LocalPtr, PrivatePtr}, {S32})
.scalarize(0)
// Accept any address space as long as the size matches
.legalIf(sameSize(0, 1))
.widenScalarIf(smallerThan(0, 1),
[](const LegalityQuery &Query) {
return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits()));
})
.narrowScalarIf(
greaterThan(0, 1),
[](const LegalityQuery &Query) {
return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits()));
});
getActionDefinitionsBuilder({G_LOAD, G_STORE})
.narrowScalarIf([](const LegalityQuery &Query) {
@ -389,6 +426,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
(Ty1.getSizeInBits() % 16 == 0);
});
// TODO: vectors of pointers
getActionDefinitionsBuilder(G_BUILD_VECTOR)
.legalForCartesianProduct(AllS32Vectors, {S32})
.legalForCartesianProduct(AllS64Vectors, {S64})

179
test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
View File

@ -1,29 +1,162 @@
# RUN: llc -march=amdgcn -run-pass=legalizer %s -o - | FileCheck %s
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck %s
---
name: test_inttoptr
name: test_inttoptr_s64_to_p0
body: |
bb.0:
liveins: $sgpr0_sgpr1, $sgpr2, $vgpr0_vgpr1, $vgpr2
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_inttoptr
; CHECK: [[S64:%[0-9]+]]:_(s64) = COPY $sgpr0_sgpr1
; CHECK: [[S32:%[0-9]+]]:_(s32) = COPY $sgpr2
; CHECK: [[V64:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[V32:%[0-9]+]]:_(s32) = COPY $vgpr2
; CHECK: (p0) = G_INTTOPTR [[V64]]
; CHECK: (p1) = G_INTTOPTR [[V64]]
; CHECK: (p3) = G_INTTOPTR [[V32]]
; CHECK: (p4) = G_INTTOPTR [[S64]]
; CHECK: (p5) = G_INTTOPTR [[S32]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s32) = COPY $sgpr2
%2:_(s64) = COPY $vgpr0_vgpr1
%3:_(s32) = COPY $vgpr2
%4:_(p0) = G_INTTOPTR %2
%5:_(p1) = G_INTTOPTR %2
%6:_(p3) = G_INTTOPTR %3
%7:_(p4) = G_INTTOPTR %0
%8:_(p5) = G_INTTOPTR %1
S_ENDPGM implicit %4, implicit %5, implicit %6, implicit %7, implicit %8
; CHECK-LABEL: name: test_inttoptr_s64_to_p0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[COPY]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p0)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p0) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_s64_to_p1
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_inttoptr_s64_to_p1
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p1) = G_INTTOPTR [[COPY]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p1)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p1) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_s64_to_p4
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_inttoptr_s64_to_p4
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p4) = G_INTTOPTR [[COPY]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p4)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p4) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_s32_to_p3
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_inttoptr_s32_to_p3
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p3) = G_INTTOPTR [[COPY]](s32)
; CHECK: $vgpr0 = COPY [[INTTOPTR]](p3)
%0:_(s32) = COPY $vgpr0
%1:_(p3) = G_INTTOPTR %0
$vgpr0 = COPY %1
...
---
name: test_inttoptr_s32_to_p5
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_inttoptr_s32_to_p5
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p5) = G_INTTOPTR [[COPY]](s32)
; CHECK: $vgpr0 = COPY [[INTTOPTR]](p5)
%0:_(s32) = COPY $vgpr0
%1:_(p5) = G_INTTOPTR %0
$vgpr0 = COPY %1
...
---
name: test_inttoptr_s64_to_p999
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_inttoptr_s64_to_p999
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p999) = G_INTTOPTR [[COPY]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p999)
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(p999) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_s32_to_p0
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_inttoptr_s32_to_p0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s32)
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[ZEXT]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p0)
%0:_(s32) = COPY $vgpr0
%1:_(p0) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_s128_to_p0
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_inttoptr_s128_to_p0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[TRUNC]](s64)
; CHECK: $vgpr0_vgpr1 = COPY [[INTTOPTR]](p0)
%0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(p0) = G_INTTOPTR %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_inttoptr_v2s64_to_v2p0
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_inttoptr_v2s64_to_v2p0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[UV]](s64)
; CHECK: [[INTTOPTR1:%[0-9]+]]:_(p0) = G_INTTOPTR [[UV1]](s64)
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[INTTOPTR]](p0), [[INTTOPTR1]](p0)
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x p0>) = G_INTTOPTR %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...
---
name: test_inttoptr_v2s32_to_v2p0
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_inttoptr_v2s32_to_v2p0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[UV]](s32)
; CHECK: [[INTTOPTR:%[0-9]+]]:_(p0) = G_INTTOPTR [[ZEXT]](s64)
; CHECK: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[UV1]](s32)
; CHECK: [[INTTOPTR1:%[0-9]+]]:_(p0) = G_INTTOPTR [[ZEXT1]](s64)
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[INTTOPTR]](p0), [[INTTOPTR1]](p0)
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
%1:_(<2 x p0>) = G_INTTOPTR %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...

162
test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir Normal file
View File

@ -0,0 +1,162 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -O0 -run-pass=legalizer -global-isel-abort=0 -o - %s | FileCheck %s
---
name: test_ptrtoint_p0_to_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p0_to_s64
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
; CHECK: $vgpr0_vgpr1 = COPY [[PTRTOINT]](s64)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_ptrtoint_p1_to_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p1_to_s64
; CHECK: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p1)
; CHECK: $vgpr0_vgpr1 = COPY [[PTRTOINT]](s64)
%0:_(p1) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_ptrtoint_p4_to_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p4_to_s64
; CHECK: [[COPY:%[0-9]+]]:_(p4) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p4)
; CHECK: $vgpr0_vgpr1 = COPY [[PTRTOINT]](s64)
%0:_(p4) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_ptrtoint_p3_to_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_ptrtoint_p3_to_s32
; CHECK: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p3)
; CHECK: $vgpr0 = COPY [[PTRTOINT]](s32)
%0:_(p3) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
$vgpr0 = COPY %1
...
---
name: test_ptrtoint_p5_to_s32
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: test_ptrtoint_p5_to_s32
; CHECK: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p5)
; CHECK: $vgpr0 = COPY [[PTRTOINT]](s32)
%0:_(p5) = COPY $vgpr0
%1:_(s32) = G_PTRTOINT %0
$vgpr0 = COPY %1
...
---
name: test_ptrtoint_p999_to_s64
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p999_to_s64
; CHECK: [[COPY:%[0-9]+]]:_(p999) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p999)
; CHECK: $vgpr0_vgpr1 = COPY [[PTRTOINT]](s64)
%0:_(p999) = COPY $vgpr0_vgpr1
%1:_(s64) = G_PTRTOINT %0
$vgpr0_vgpr1 = COPY %1
...
---
name: test_ptrtoint_p0_to_s32
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p0_to_s32
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[PTRTOINT]](s64)
; CHECK: $vgpr0 = COPY [[TRUNC]](s32)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(s32) = G_PTRTOINT %0
$vgpr0 = COPY %1
...
---
name: test_ptrtoint_p0_to_s128
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_ptrtoint_p0_to_s128
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[COPY]](p0)
; CHECK: [[ZEXT:%[0-9]+]]:_(s128) = G_ZEXT [[PTRTOINT]](s64)
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ZEXT]](s128)
%0:_(p0) = COPY $vgpr0_vgpr1
%1:_(s128) = G_PTRTOINT %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...
---
name: test_ptrtoint_v2p0_to_v2s64
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_ptrtoint_v2p0_to_v2s64
; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[UV]](p0)
; CHECK: [[PTRTOINT1:%[0-9]+]]:_(s64) = G_PTRTOINT [[UV1]](p0)
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[PTRTOINT]](s64), [[PTRTOINT1]](s64)
; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s64>) = G_PTRTOINT %0
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...
---
name: test_ptrtoint_v2s32_to_v2p0
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_ptrtoint_v2s32_to_v2p0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[UV:%[0-9]+]]:_(p0), [[UV1:%[0-9]+]]:_(p0) = G_UNMERGE_VALUES [[COPY]](<2 x p0>)
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[UV]](p0)
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[PTRTOINT]](s64)
; CHECK: [[PTRTOINT1:%[0-9]+]]:_(s64) = G_PTRTOINT [[UV1]](p0)
; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[PTRTOINT1]](s64)
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[TRUNC]](s32), [[TRUNC1]](s32)
; CHECK: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
%0:_(<2 x p0>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s32>) = G_PTRTOINT %0
$vgpr0_vgpr1 = COPY %1
...