diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index 86deae039fa..15ac2a2379d 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -354,7 +354,7 @@ MVT AMDGPUTargetLowering::getVectorIdxTy() const {
 // FIXME: Why are we reporting vectors of FP immediates as legal?
 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
   EVT ScalarVT = VT.getScalarType();
-  return (ScalarVT == MVT::f32 || MVT::f64);
+  return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64);
 }
 
 // We don't want to shrink f64 / f32 constants.