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[DAGCombine] Refactor common addcarry pattern.

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Summary: This pattern is no very useful per se, but it exposes optimization for toehr patterns that wouldn't kick in otherwize. It's very common and worth optimizing for.

Reviewers: jyknight, nemanjai, mkuper, spatel, RKSimon, zvi, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32756

llvm-svn: 304402
This commit is contained in:
Amaury Sechet 2017-06-01 10:48:04 +00:00
parent 6c7366f926
commit 8de65f75cc
2 changed files with 40 additions and 12 deletions
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35
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -2216,6 +2216,41 @@ SDValue DAGCombiner::visitADDCARRYLike(SDValue N0, SDValue N1, SDValue CarryIn,
return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(),
N0.getOperand(0), N0.getOperand(1), CarryIn);
/**
* When one of the addcarry argument is itself a carry, we may be facing
* a diamond carry propagation. In which case we try to transform the DAG
* to ensure linear carry propagation if that is possible.
*
* We are trying to get:
* (addcarry X, 0, (addcarry A, B, Z):Carry)
*/
if (auto Y = getAsCarry(TLI, N1)) {
/**
* (uaddo A, B)
* / \
* Carry Sum
* | \
* | (addcarry *, 0, Z)
* | /
* \ Carry
* | /
* (addcarry X, *, *)
*/
if (Y.getOpcode() == ISD::UADDO &&
CarryIn.getResNo() == 1 &&
CarryIn.getOpcode() == ISD::ADDCARRY &&
isNullConstant(CarryIn.getOperand(1)) &&
CarryIn.getOperand(0) == Y.getValue(0)) {
auto NewY = DAG.getNode(ISD::ADDCARRY, SDLoc(N), Y->getVTList(),
Y.getOperand(0), Y.getOperand(1),
CarryIn.getOperand(2));
AddToWorklist(NewY.getNode());
return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0,
DAG.getConstant(0, SDLoc(N), N0.getValueType()),
NewY.getValue(1));
}
}
return SDValue();
}

17
test/CodeGen/X86/addcarry.ll
View File

@ -86,21 +86,14 @@ entry:
define %scalar @pr31719(%scalar* nocapture readonly %this, %scalar %arg.b) {
; CHECK-LABEL: pr31719:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: xorl %r10d, %r10d
; CHECK-NEXT: addq 8(%rsi), %rcx
; CHECK-NEXT: setb %r10b
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: addq 16(%rsi), %r8
; CHECK-NEXT: setb %al
; CHECK-NEXT: addq 24(%rsi), %r9
; CHECK-NEXT: addq (%rsi), %rdx
; CHECK-NEXT: adcq $0, %rcx
; CHECK-NEXT: adcq %r8, %r10
; CHECK-NEXT: adcq %r9, %rax
; CHECK-NEXT: adcq 8(%rsi), %rcx
; CHECK-NEXT: adcq 16(%rsi), %r8
; CHECK-NEXT: adcq 24(%rsi), %r9
; CHECK-NEXT: movq %rdx, (%rdi)
; CHECK-NEXT: movq %rcx, 8(%rdi)
; CHECK-NEXT: movq %r10, 16(%rdi)
; CHECK-NEXT: movq %rax, 24(%rdi)
; CHECK-NEXT: movq %r8, 16(%rdi)
; CHECK-NEXT: movq %r9, 24(%rdi)
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
entry: