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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00

Delete fast-isel's trivial load optimization; it breaks debugging because

it can look past points where a debugger might modify user variables.

llvm-svn: 108336
This commit is contained in:
Dan Gohman 2010-07-14 17:25:37 +00:00
parent f46d710471
commit 8e01a639c0
3 changed files with 0 additions and 56 deletions

View File

@ -307,8 +307,6 @@ protected:
}
private:
bool SelectLoad(const User *I);
bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
bool SelectFNeg(const User *I);

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@ -781,40 +781,9 @@ FastISel::SelectFNeg(const User *I) {
return true;
}
bool
FastISel::SelectLoad(const User *I) {
LoadInst *LI = const_cast<LoadInst *>(cast<LoadInst>(I));
// For a load from an alloca, make a limited effort to find the value
// already available in a register, avoiding redundant loads.
if (!LI->isVolatile() && isa<AllocaInst>(LI->getPointerOperand())) {
BasicBlock::iterator ScanFrom = LI;
if (const Value *V = FindAvailableLoadedValue(LI->getPointerOperand(),
LI->getParent(), ScanFrom)) {
if (!V->use_empty() &&
(!isa<Instruction>(V) ||
cast<Instruction>(V)->getParent() == LI->getParent() ||
(isa<AllocaInst>(V) &&
FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(V)))) &&
(!isa<Argument>(V) ||
LI->getParent() == &LI->getParent()->getParent()->getEntryBlock())) {
unsigned ResultReg = getRegForValue(V);
if (ResultReg != 0) {
UpdateValueMap(I, ResultReg);
return true;
}
}
}
}
return false;
}
bool
FastISel::SelectOperator(const User *I, unsigned Opcode) {
switch (Opcode) {
case Instruction::Load:
return SelectLoad(I);
case Instruction::Add:
return SelectBinaryOp(I, ISD::ADD);
case Instruction::FAdd:

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@ -1,23 +0,0 @@
; RUN: llc -march=x86-64 -O0 -asm-verbose=false < %s | FileCheck %s
; Fast-isel shouldn't reload the argument values from the stack.
; CHECK: foo:
; CHECK-NEXT: movq %rdi, -8(%rsp)
; CHECK-NEXT: movq %rsi, -16(%rsp)
; CHECK-NEXT: movsd 128(%rsi,%rdi,8), %xmm0
; CHECK-NEXT: ret
define double @foo(i64 %x, double* %p) nounwind {
entry:
%x.addr = alloca i64, align 8 ; <i64*> [#uses=2]
%p.addr = alloca double*, align 8 ; <double**> [#uses=2]
store i64 %x, i64* %x.addr
store double* %p, double** %p.addr
%tmp = load i64* %x.addr ; <i64> [#uses=1]
%tmp1 = load double** %p.addr ; <double*> [#uses=1]
%add = add nsw i64 %tmp, 16 ; <i64> [#uses=1]
%arrayidx = getelementptr inbounds double* %tmp1, i64 %add ; <double*> [#uses=1]
%tmp2 = load double* %arrayidx ; <double> [#uses=1]
ret double %tmp2
}