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[X86][X87] Regenerate inline-asm tests
llvm-svn: 310201
This commit is contained in:
Simon Pilgrim
parent
809a734968
commit
8e05f97d09
@ -1,124 +1,149 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -verify-machineinstrs -no-integrated-as | FileCheck %s
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; There should be no stack manipulations between the inline asm and ret.
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; CHECK: test1
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; CHECK: InlineAsm End
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; CHECK-NEXT: ret
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define x86_fp80 @test1() {
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%tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
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ret x86_fp80 %tmp85
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; CHECK-LABEL: test1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fld0
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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%tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"()
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ret x86_fp80 %tmp85
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}
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; CHECK: test2
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; CHECK: InlineAsm End
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; CHECK-NEXT: ret
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define double @test2() {
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%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
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ret double %tmp85
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fld0
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
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ret double %tmp85
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}
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; Setting up argument in st(0) should be a single fld.
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; CHECK: test3
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; CHECK: fld
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; CHECK-NEXT: InlineAsm Start
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; Asm consumes stack, nothing should be popped.
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test3(x86_fp80 %X) {
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X)
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ret void
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: frob
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X)
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ret void
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}
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; CHECK: test4
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; CHECK: fld
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; CHECK-NEXT: InlineAsm Start
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test4(double %X) {
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X)
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ret void
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; CHECK-LABEL: test4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: frob
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X)
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ret void
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}
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; Same as test3/4, but using value from fadd.
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; The fadd can be done in xmm or x87 regs - we don't test that.
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; CHECK: test5
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; CHECK: InlineAsm End
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; CHECK-NOT: fstp
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; CHECK: ret
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define void @test5(double %X) {
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%Y = fadd double %X, 123.0
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y)
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ret void
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; CHECK-LABEL: test5:
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; CHECK: ## BB#0:
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fadds LCPI4_0
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: frob
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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%Y = fadd double %X, 123.0
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call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y)
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ret void
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}
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; CHECK: test6
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define void @test6(double %A, double %B, double %C,
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double %D, double %E) nounwind {
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define void @test6(double %A, double %B, double %C, double %D, double %E) nounwind {
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; CHECK-LABEL: test6:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: foo %st(0) %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstp %st(0)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: bar %st(1) %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstp %st(1)
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; CHECK-NEXT: fstp %st(0)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: baz %st(1) %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstp %st(0)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: baz %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstp %st(0)
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; CHECK-NEXT: retl
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; CHECK-NEXT: ## -- End function
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entry:
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; Uses the same value twice, should have one fstp after the asm.
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; CHECK: foo
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind
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tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind
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; Uses two different values, should be in st(0)/st(1) and both be popped.
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; CHECK: bar
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NEXT: fstp
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tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind
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; Uses two different values, one of which isn't killed in this asm, it
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; should not be popped after the asm.
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; CHECK: baz
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind
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tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind
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; Uses two different values, one of which isn't killed in this asm, it should not be popped after the asm.
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tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind
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; This is the last use of %D, so it should be popped after.
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; CHECK: baz
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; CHECK: InlineAsm End
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; CHECK-NEXT: fstp
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; CHECK-NOT: fstp
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; CHECK: ret
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tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind
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ret void
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tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind
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ret void
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}
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; PR4185
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; Passing a non-killed value to asm in {st}.
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; Make sure it is duped before.
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; asm kills st(0), so we shouldn't pop anything
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; CHECK: testPR4185
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; CHECK: fld %st(0)
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: ret
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; A valid alternative would be to remat the constant pool load before each
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; inline asm.
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define void @testPR4185() {
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; CHECK-LABEL: testPR4185:
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; CHECK: ## BB#0: ## %return
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; CHECK-NEXT: flds LCPI6_0
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; CHECK-NEXT: fld %st(0)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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return:
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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ret void
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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ret void
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}
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; Passing a non-killed value through asm in {st}.
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; Make sure it is not duped before.
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; Second asm kills st(0), so we shouldn't pop anything
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; CHECK: testPR4185b
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; CHECK-NOT: fld %st(0)
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; CHECK: fistl
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; CHECK-NOT: fstp
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; CHECK: ret
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; A valid alternative would be to remat the constant pool load before each
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; inline asm.
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; A valid alternative would be to remat the constant pool load before each inline asm.
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define void @testPR4185b() {
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; CHECK-LABEL: testPR4185b:
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; CHECK: ## BB#0: ## %return
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; CHECK-NEXT: flds LCPI7_0
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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return:
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call void asm sideeffect "fistl $0", "{st}"(double 1.000000e+06)
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call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06)
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@ -127,57 +152,90 @@ return:
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; PR4459
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; The return value from ceil must be duped before being consumed by asm.
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; CHECK: testPR4459
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; CHECK: ceil
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; CHECK: fld %st(0)
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; CHECK-NOT: fxch
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; CHECK: fistpl
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; CHECK-NOT: fxch
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; CHECK: fstpt
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; CHECK: test
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define void @testPR4459(x86_fp80 %a) {
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; CHECK-LABEL: testPR4459:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: subl $28, %esp
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; CHECK-NEXT: Lcfi0:
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
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; CHECK-NEXT: fstpt (%esp)
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; CHECK-NEXT: calll _ceil
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; CHECK-NEXT: fld %st(0)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstpt (%esp)
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; CHECK-NEXT: calll _test3
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; CHECK-NEXT: addl $28, %esp
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; CHECK-NEXT: retl
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entry:
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%0 = call x86_fp80 @ceil(x86_fp80 %a)
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call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0)
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call void @test3(x86_fp80 %0 )
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ret void
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%0 = call x86_fp80 @ceil(x86_fp80 %a)
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call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0)
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call void @test3(x86_fp80 %0 )
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ret void
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}
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declare x86_fp80 @ceil(x86_fp80)
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; PR4484
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; test1 leaves a value on the stack that is needed after the asm.
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; CHECK: testPR4484
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; CHECK: calll _test1
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; CHECK-NOT: fstp
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; Load %a from stack after ceil
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; CHECK: fldt
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; CHECK-NOT: fxch
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; CHECK: fistpl
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; CHECK-NOT: fstp
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; Set up call to test.
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; CHECK: fstpt
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; CHECK: test
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define void @testPR4484(x86_fp80 %a) {
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; CHECK-LABEL: testPR4484:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: subl $28, %esp
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; CHECK-NEXT: Lcfi1:
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
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; CHECK-NEXT: fstpt {{[0-9]+}}(%esp) ## 10-byte Folded Spill
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; CHECK-NEXT: calll _test1
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; CHECK-NEXT: fldt {{[0-9]+}}(%esp) ## 10-byte Folded Reload
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstpt (%esp)
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; CHECK-NEXT: calll _test3
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; CHECK-NEXT: addl $28, %esp
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; CHECK-NEXT: retl
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entry:
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%0 = call x86_fp80 @test1()
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call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
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call void @test3(x86_fp80 %0)
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ret void
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%0 = call x86_fp80 @test1()
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call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a)
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call void @test3(x86_fp80 %0)
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ret void
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}
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; PR4485
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; CHECK: testPR4485
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define void @testPR4485(x86_fp80* %a) {
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; CHECK-LABEL: testPR4485:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: fldt (%eax)
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; CHECK-NEXT: flds LCPI10_0
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; CHECK-NEXT: fmul %st(0), %st(1)
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; CHECK-NEXT: flds LCPI10_1
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; CHECK-NEXT: fmul %st(0), %st(2)
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; CHECK-NEXT: fxch %st(2)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fldt (%eax)
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; CHECK-NEXT: fmulp %st(1)
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; CHECK-NEXT: fmulp %st(1)
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistpl %st(0)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: retl
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entry:
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%0 = load x86_fp80, x86_fp80* %a, align 16
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%1 = fmul x86_fp80 %0, 0xK4006B400000000000000
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%2 = fmul x86_fp80 %1, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
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%3 = load x86_fp80, x86_fp80* %a, align 16
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%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
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%5 = fmul x86_fp80 %4, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
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ret void
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%0 = load x86_fp80, x86_fp80* %a, align 16
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%1 = fmul x86_fp80 %0, 0xK4006B400000000000000
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%2 = fmul x86_fp80 %1, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2)
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%3 = load x86_fp80, x86_fp80* %a, align 16
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%4 = fmul x86_fp80 %3, 0xK4006B400000000000000
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%5 = fmul x86_fp80 %4, 0xK4012F424000000000000
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tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5)
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ret void
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}
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; An input argument in a fixed position is implicitly popped by the asm only if
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@ -189,13 +247,17 @@ entry:
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; void fist1(long double x, int *p) {
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; asm volatile ("fistl %1" : : "t"(x), "m"(*p));
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; }
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;
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; CHECK: fist1
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; CHECK: fldt
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; CHECK: fistl (%e
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; CHECK: fstp
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; CHECK: ret
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define void @fist1(x86_fp80 %x, i32* %p) nounwind ssp {
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; CHECK-LABEL: fist1:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: ## InlineAsm Start
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; CHECK-NEXT: fistl (%eax)
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; CHECK-NEXT: ## InlineAsm End
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; CHECK-NEXT: fstp %st(0)
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; CHECK-NEXT: retl
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; CHECK-NEXT: ## -- End function
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entry:
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tail call void asm sideeffect "fistl $1", "{st},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
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ret void
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@ -209,13 +271,16 @@ entry:
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; asm ("fistl %1" : "=&t"(y) : "0"(x), "m"(*p) : "memory");
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; return y;
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; }
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;
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; CHECK: fist2
|
||||
; CHECK: fldt
|
||||
; CHECK: fistl (%e
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
define x86_fp80 @fist2(x86_fp80 %x, i32* %p) nounwind ssp {
|
||||
; CHECK-LABEL: fist2:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fistl (%eax)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
%0 = tail call x86_fp80 asm "fistl $2", "=&{st},0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind
|
||||
ret x86_fp80 %0
|
||||
@ -226,14 +291,18 @@ entry:
|
||||
; void fucomp1(long double x, long double y) {
|
||||
; asm volatile ("fucomp %1" : : "t"(x), "f"(y) : "st");
|
||||
; }
|
||||
; CHECK: fucomp1
|
||||
; CHECK: fldt
|
||||
; CHECK: fldt
|
||||
; CHECK: fucomp %st
|
||||
; CHECK: fstp
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
define void @fucomp1(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
|
||||
; CHECK-LABEL: fucomp1:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fxch %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fucomp %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
tail call void asm sideeffect "fucomp $1", "{st},f,~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
|
||||
ret void
|
||||
@ -249,26 +318,34 @@ entry:
|
||||
; asm volatile ("fucompp %1" : : "t"(x), "u"(y) : "st", "st(1)");
|
||||
; }
|
||||
;
|
||||
; CHECK: fucomp2
|
||||
; CHECK: fldt
|
||||
; CHECK: fldt
|
||||
; CHECK: fucomp %st(1)
|
||||
; CHECK: fstp
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
;
|
||||
; CHECK: fucomp3
|
||||
; CHECK: fldt
|
||||
; CHECK: fldt
|
||||
; CHECK: fucompp %st(1)
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
define void @fucomp2(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
|
||||
; CHECK-LABEL: fucomp2:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fxch %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fucomp %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
tail call void asm sideeffect "fucomp $1", "{st},{st(1)},~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @fucomp3(x86_fp80 %x, x86_fp80 %y) nounwind ssp {
|
||||
; CHECK-LABEL: fucomp3:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fldt {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fxch %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fucompp %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
tail call void asm sideeffect "fucompp $1", "{st},{st(1)},~{st},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind
|
||||
ret void
|
||||
@ -276,15 +353,16 @@ entry:
|
||||
|
||||
; One input, two outputs, one dead output.
|
||||
%complex = type { float, float }
|
||||
; CHECK: sincos1
|
||||
; CHECK: flds
|
||||
; CHECK-NOT: fxch
|
||||
; CHECK: sincos
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: fstp %st(1)
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
define float @sincos1(float %x) nounwind ssp {
|
||||
; CHECK-LABEL: sincos1:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: sincos
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(1)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
%0 = tail call %complex asm "sincos", "={st},={st(1)},0,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
|
||||
%asmresult = extractvalue %complex %0, 0
|
||||
@ -292,15 +370,16 @@ entry:
|
||||
}
|
||||
|
||||
; Same thing, swapped output operands.
|
||||
; CHECK: sincos2
|
||||
; CHECK: flds
|
||||
; CHECK-NOT: fxch
|
||||
; CHECK: sincos
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: fstp %st(1)
|
||||
; CHECK-NOT: fstp
|
||||
; CHECK: ret
|
||||
define float @sincos2(float %x) nounwind ssp {
|
||||
; CHECK-LABEL: sincos2:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: sincos
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(1)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
%0 = tail call %complex asm "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
|
||||
%asmresult = extractvalue %complex %0, 1
|
||||
@ -308,21 +387,27 @@ entry:
|
||||
}
|
||||
|
||||
; Clobber st(0) after it was live-out/dead from the previous asm.
|
||||
; CHECK: sincos3
|
||||
; Load x, make a copy for the second asm.
|
||||
; CHECK: flds
|
||||
; CHECK: fld %st(0)
|
||||
; CHECK: sincos
|
||||
; Discard dead result in st(0), bring x to the top.
|
||||
; CHECK: fstp %st(0)
|
||||
; CHECK: fxch
|
||||
; x is now in st(0) for the second asm
|
||||
; CHECK: sincos
|
||||
; Discard both results.
|
||||
; CHECK: fstp
|
||||
; CHECK: fstp
|
||||
; CHECK: ret
|
||||
define float @sincos3(float %x) nounwind ssp {
|
||||
; CHECK-LABEL: sincos3:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fld %st(0)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: sincos
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: fxch %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: sincos
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(1)
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
%0 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
|
||||
%1 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind
|
||||
@ -331,11 +416,19 @@ entry:
|
||||
}
|
||||
|
||||
; Pass the same value in two fixed stack slots.
|
||||
; CHECK: PR10602
|
||||
; CHECK: flds LCPI
|
||||
; CHECK: fld %st(0)
|
||||
; CHECK: fcomi %st(1), %st(0)
|
||||
define i32 @PR10602() nounwind ssp {
|
||||
; CHECK-LABEL: PR10602:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: flds LCPI19_0
|
||||
; CHECK-NEXT: fld %st(0)
|
||||
; CHECK-NEXT: fxch %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fcomi %st(1), %st(0); pushf; pop %eax
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: fstp %st(0)
|
||||
; CHECK-NEXT: retl
|
||||
; CHECK-NEXT: ## -- End function
|
||||
entry:
|
||||
%0 = tail call i32 asm "fcomi $2, $1; pushf; pop $0", "=r,{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(double 2.000000e+00, double 2.000000e+00) nounwind
|
||||
ret i32 %0
|
||||
@ -350,14 +443,6 @@ entry:
|
||||
; INLINEASM <es:fldcw $0> [sideeffect] [mayload] [attdialect], $0:[mem], %EAX<undef>, 1, %noreg, 0, %noreg, $1:[clobber], %EFLAGS<earlyclobber,imp-def,dead>
|
||||
; %FP0<def> = COPY %ST0
|
||||
|
||||
; CHECK-LABEL: _test_live_st
|
||||
; CHECK: ## InlineAsm Start
|
||||
; CHECK: frndint
|
||||
; CHECK: ## InlineAsm End
|
||||
; CHECK: ## InlineAsm Start
|
||||
; CHECK: fldcw
|
||||
; CHECK: ## InlineAsm End
|
||||
|
||||
%struct.fpu_t = type { [8 x x86_fp80], x86_fp80, %struct.anon1, %struct.anon2, i32, i8, [15 x i8] }
|
||||
%struct.anon1 = type { i32, i32, i32 }
|
||||
%struct.anon2 = type { i32, i32, i32, i32 }
|
||||
@ -366,6 +451,36 @@ entry:
|
||||
|
||||
; Function Attrs: ssp
|
||||
define void @test_live_st(i32 %a1) {
|
||||
; CHECK-LABEL: test_live_st:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: subl $12, %esp
|
||||
; CHECK-NEXT: Lcfi2:
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-NEXT: fldt (%eax)
|
||||
; CHECK-NEXT: cmpl $1, {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: jne LBB20_2
|
||||
; CHECK-NEXT: ## BB#1: ## %sw.bb4.i
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: frndint
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: fldcw (%eax)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit
|
||||
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) ## imm = 0xC7F
|
||||
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fistpl {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: fildl {{[0-9]+}}(%esp)
|
||||
; CHECK-NEXT: movl L_fpu$non_lazy_ptr, %eax
|
||||
; CHECK-NEXT: fstpt 128(%eax)
|
||||
; CHECK-NEXT: addl $12, %esp
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%0 = load x86_fp80, x86_fp80* undef, align 16
|
||||
%cond = icmp eq i32 %a1, 1
|
||||
@ -388,13 +503,14 @@ return:
|
||||
}
|
||||
|
||||
; Check that x87 stackifier is correctly rewriting FP registers to ST registers.
|
||||
;
|
||||
; CHECK-LABEL: _test_operand_rewrite
|
||||
; CHECK: ## InlineAsm Start
|
||||
; CHECK: foo %st(0), %st(1)
|
||||
; CHECK: ## InlineAsm End
|
||||
|
||||
define double @test_operand_rewrite() {
|
||||
; CHECK-LABEL: test_operand_rewrite:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: ## InlineAsm Start
|
||||
; CHECK-NEXT: foo %st(0), %st(1)
|
||||
; CHECK-NEXT: ## InlineAsm End
|
||||
; CHECK-NEXT: fsubp %st(1)
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%0 = tail call { double, double } asm sideeffect "foo $0, $1", "={st},={st(1)},~{dirflag},~{fpsr},~{flags}"()
|
||||
%asmresult = extractvalue { double, double } %0, 0
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user