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[mips] Deal with empty blocks in the mips hazard scheduler
This patch teaches the hazard scheduler how to handle empty blocks when search for the next real instruction when dealing with forbidden slots. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D31293 llvm-svn: 299427
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@ -103,23 +103,24 @@ static Iter getNextMachineInstrInBB(Iter Position) {
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// Find the next real instruction from the current position, looking through
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// Find the next real instruction from the current position, looking through
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// basic block boundaries.
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// basic block boundaries.
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static Iter getNextMachineInstr(Iter Position, MachineBasicBlock *Parent) {
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static std::pair<Iter, bool> getNextMachineInstr(Iter Position, MachineBasicBlock * Parent) {
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if (Position == Parent->end()) {
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if (Position == Parent->end()) {
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MachineBasicBlock *Succ = Parent->getNextNode();
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do {
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if (Succ != nullptr && Parent->isSuccessor(Succ)) {
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MachineBasicBlock *Succ = Parent->getNextNode();
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Position = Succ->begin();
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if (Succ != nullptr && Parent->isSuccessor(Succ)) {
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Parent = Succ;
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Position = Succ->begin();
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} else {
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Parent = Succ;
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llvm_unreachable(
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} else {
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"Should have identified the end of the function earlier!");
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return std::make_pair(Position, true);
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}
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}
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} while (Parent->empty());
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}
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}
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Iter Instr = getNextMachineInstrInBB(Position);
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Iter Instr = getNextMachineInstrInBB(Position);
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if (Instr == Parent->end()) {
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if (Instr == Parent->end()) {
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return getNextMachineInstr(Instr, Parent);
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return getNextMachineInstr(Instr, Parent);
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}
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}
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return Instr;
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return std::make_pair(Instr, false);
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}
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}
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bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
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bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
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@ -145,7 +146,9 @@ bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
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bool LastInstInFunction =
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bool LastInstInFunction =
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std::next(I) == FI->end() && std::next(FI) == MF.end();
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std::next(I) == FI->end() && std::next(FI) == MF.end();
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if (!LastInstInFunction) {
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if (!LastInstInFunction) {
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Inst = getNextMachineInstr(std::next(I), &*FI);
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std::pair<Iter, bool> Res = getNextMachineInstr(std::next(I), &*FI);
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LastInstInFunction |= Res.second;
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Inst = Res.first;
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}
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}
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if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) {
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if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) {
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92
test/CodeGen/Mips/compactbranches/empty-block.mir
Normal file
92
test/CodeGen/Mips/compactbranches/empty-block.mir
Normal file
@ -0,0 +1,92 @@
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# RUN: llc -march=mipsel -mcpu=mips32r6 -start-after=block-placement %s -o - | FileCheck %s
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# Check that empty blocks in the cfg don't cause the mips hazard scheduler to
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# crash and that the nop is inserted correctly.
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# CHECK: blezc
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# CHECK: nop
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# CHECK: # BB#1:
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# CHECK: .insn
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# CHECK: # BB#2:
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# CHECK: .insn
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# CHECK: # BB#3:
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# CHECK: jal
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--- |
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; ModuleID = '<stdin>'
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source_filename = "<stdin>"
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target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
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declare i32 @k()
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declare void @f(i32)
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define void @l5() {
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entry:
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%call = tail call i32 @k()
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%cmp = icmp sgt i32 %call, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @f(i32 signext 2)
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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---
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name: l5
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alignment: 2
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exposesReturnsTwice: false
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noVRegs: true
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 24
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offsetAdjustment: 0
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maxAlignment: 4
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 16
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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stack:
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- { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, callee-saved-register: '%ra' }
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body: |
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bb.0.entry:
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successors: %bb.1.if.then(0x50000000), %bb.4.if.end(0x30000000)
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liveins: %ra
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%sp = ADDiu %sp, -24
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CFI_INSTRUCTION def_cfa_offset 24
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SW killed %ra, %sp, 20 :: (store 4 into %stack.0)
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CFI_INSTRUCTION offset %ra_64, -4
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JAL @k, csr_o32_fp64, implicit-def dead %ra, implicit-def %sp, implicit-def %v0
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BLEZ %v0, %bb.4.if.end, implicit-def %at
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bb.1.if.then:
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successors: %bb.2.if.then(0x80000000)
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bb.2.if.then:
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successors: %bb.3.if.then(0x80000000)
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bb.3.if.then:
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successors: %bb.4.if.end(0x80000000)
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%a0 = ADDiu %zero, 2
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JAL @f, csr_o32_fp64, implicit-def dead %ra, implicit killed %a0, implicit-def %sp
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bb.4.if.end:
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%ra = LW %sp, 20 :: (load 4 from %stack.0)
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%sp = ADDiu %sp, 24
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PseudoReturn undef %ra
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...
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