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[SystemZ] Use valid base/index regs for inline asm
Summary: Inline asm memory constraints can have the base or index register be assigned to %r0 right now. Make sure that we assign only ADDR64 registers to the base and index. Reviewers: uweigand Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23367 llvm-svn: 279157
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@ -1375,6 +1375,29 @@ SelectInlineAsmMemoryOperand(const SDValue &Op,
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}
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if (selectBDXAddr(Form, DispRange, Op, Base, Disp, Index)) {
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const TargetRegisterClass *TRC =
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Subtarget->getRegisterInfo()->getPointerRegClass(*MF);
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SDLoc DL(Base);
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SDValue RC = CurDAG->getTargetConstant(TRC->getID(), DL, MVT::i32);
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// Make sure that the base address doesn't go into %r0.
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// If it's a TargetFrameIndex or a fixed register, we shouldn't do anything.
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if (Base.getOpcode() != ISD::TargetFrameIndex &&
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Base.getOpcode() != ISD::Register) {
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Base =
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SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
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DL, Base.getValueType(),
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Base, RC), 0);
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}
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// Make sure that the index register isn't assigned to %r0 either.
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if (Index.getOpcode() != ISD::Register) {
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Index =
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SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
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DL, Index.getValueType(),
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Index, RC), 0);
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}
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OutOps.push_back(Base);
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OutOps.push_back(Disp);
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OutOps.push_back(Index);
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@ -74,8 +74,8 @@ define void @f6(i64 %base, i64 %index) {
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; Check that LAY is used if there is an index but the displacement is too large
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define void @f7(i64 %base, i64 %index) {
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; CHECK-LABEL: f7:
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; CHECK: lay %r0, 4096(%r3,%r2)
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; CHECK: blah 0(%r0)
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; CHECK: lay %r1, 4096(%r3,%r2)
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; CHECK: blah 0(%r1)
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; CHECK: br %r14
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%add = add i64 %base, 4096
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%addi = add i64 %add, %index
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