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[X86][AVX] Attempt to fold extract_subvector(shuffle(X)) -> extract_subvector(X)

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If we're extracting a subvector from a shuffle that is shuffling entire subvectors we can peek through and extract the subvector from the shuffle source instead.

This helps remove some cases where concat_vectors(extract_subvector(),extract_subvector()) legalizations has resulted in BLEND/VPERM2F128 shuffles of the subvectors.
This commit is contained in:
Simon Pilgrim 2020-07-09 13:25:12 +01:00
parent ddf17279b8
commit 8e73a34d4d
8 changed files with 297 additions and 303 deletions
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25
lib/Target/X86/X86ISelLowering.cpp
View File

@ -48304,6 +48304,31 @@ static SDValue combineExtractSubvector(SDNode *N, SelectionDAG &DAG,
InVec.getOperand(0).getValueType() == VT)
return InVec.getOperand(0);
// Attempt to extract from the source of a shuffle vector.
if ((InVecVT.getSizeInBits() % VT.getSizeInBits()) == 0 &&
(IdxVal % VT.getVectorNumElements()) == 0) {
SmallVector<int, 32> ShuffleMask;
SmallVector<int, 32> ScaledMask;
SmallVector<SDValue, 2> ShuffleInputs;
unsigned NumSubVecs = InVecVT.getSizeInBits() / VT.getSizeInBits();
// Decode the shuffle mask and scale it so its shuffling subvectors.
if (getTargetShuffleInputs(InVecBC, ShuffleInputs, ShuffleMask, DAG) &&
scaleShuffleElements(ShuffleMask, NumSubVecs, ScaledMask)) {
unsigned SubVecIdx = IdxVal / VT.getVectorNumElements();
if (ScaledMask[SubVecIdx] == SM_SentinelUndef)
return DAG.getUNDEF(VT);
if (ScaledMask[SubVecIdx] == SM_SentinelZero)
return getZeroVector(VT, Subtarget, DAG, SDLoc(N));
SDValue Src = ShuffleInputs[ScaledMask[SubVecIdx] / NumSubVecs];
if (Src.getValueSizeInBits() == InVecVT.getSizeInBits()) {
unsigned SrcSubVecIdx = ScaledMask[SubVecIdx] % NumSubVecs;
unsigned SrcEltIdx = SrcSubVecIdx * VT.getVectorNumElements();
return extractSubVector(DAG.getBitcast(InVecVT, Src), SrcEltIdx, DAG,
SDLoc(N), VT.getSizeInBits());
}
}
}
// If we're extracting the lowest subvector and we're the only user,
// we may be able to perform this with a smaller vector width.
if (IdxVal == 0 && InVec.hasOneUse()) {

17
test/CodeGen/X86/avx-vperm2x128.ll
View File

@ -603,9 +603,8 @@ entry:
define <4 x i64> @ld0_hi0_lo1_4i64(<4 x i64> * %pa, <4 x i64> %b) nounwind uwtable readnone ssp {
; AVX1-LABEL: ld0_hi0_lo1_4i64:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = mem[2,3],ymm0[0,1]
; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1
; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: retq
@ -647,12 +646,10 @@ entry:
define <8 x i32> @ld0_hi0_lo1_8i32(<8 x i32> * %pa, <8 x i32> %b) nounwind uwtable readnone ssp {
; AVX1-LABEL: ld0_hi0_lo1_8i32:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = mem[2,3],ymm0[0,1]
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1,2,3,4]
; AVX1-NEXT: vpaddd %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4]
; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpaddd 16(%rdi), %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ld0_hi0_lo1_8i32:
@ -670,9 +667,9 @@ entry:
define <8 x i32> @ld1_hi0_hi1_8i32(<8 x i32> %a, <8 x i32> * %pb) nounwind uwtable readnone ssp {
; AVX1-LABEL: ld1_hi0_hi1_8i32:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4]
; AVX1-NEXT: vpaddd 16(%rdi), %xmm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: retq

32
test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
View File

@ -7740,7 +7740,7 @@ define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) {
; X86: # %bb.0: # %entry
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X86-NEXT: vpmaxsq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
@ -7753,7 +7753,7 @@ define i64 @test_mm512_reduce_max_epi64(<8 x i64> %__W) {
; X64: # %bb.0: # %entry
; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X64-NEXT: vpmaxsq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
@ -7779,7 +7779,7 @@ define i64 @test_mm512_reduce_max_epu64(<8 x i64> %__W) {
; X86: # %bb.0: # %entry
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X86-NEXT: vpmaxuq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
@ -7792,7 +7792,7 @@ define i64 @test_mm512_reduce_max_epu64(<8 x i64> %__W) {
; X64: # %bb.0: # %entry
; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X64-NEXT: vpmaxuq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
@ -7865,7 +7865,7 @@ define i64 @test_mm512_reduce_min_epi64(<8 x i64> %__W) {
; X86: # %bb.0: # %entry
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X86-NEXT: vpminsq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm0
@ -7878,7 +7878,7 @@ define i64 @test_mm512_reduce_min_epi64(<8 x i64> %__W) {
; X64: # %bb.0: # %entry
; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X64-NEXT: vpminsq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm0
@ -7904,7 +7904,7 @@ define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) {
; X86: # %bb.0: # %entry
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X86-NEXT: vpminuq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm0
@ -7917,7 +7917,7 @@ define i64 @test_mm512_reduce_min_epu64(<8 x i64> %__W) {
; X64: # %bb.0: # %entry
; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X64-NEXT: vpminuq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm0
@ -7994,7 +7994,7 @@ define i64 @test_mm512_mask_reduce_max_epi64(i8 zeroext %__M, <8 x i64> %__W) {
; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X86-NEXT: vpmaxsq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
@ -8010,7 +8010,7 @@ define i64 @test_mm512_mask_reduce_max_epi64(i8 zeroext %__M, <8 x i64> %__W) {
; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X64-NEXT: vpmaxsq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0
@ -8041,7 +8041,7 @@ define i64 @test_mm512_mask_reduce_max_epu64(i8 zeroext %__M, <8 x i64> %__W) {
; X86-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}
; X86-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
@ -8056,7 +8056,7 @@ define i64 @test_mm512_mask_reduce_max_epu64(i8 zeroext %__M, <8 x i64> %__W) {
; X64-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z}
; X64-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[4,5,6,7,0,1,2,3]
; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0
@ -8144,7 +8144,7 @@ define i64 @test_mm512_mask_reduce_min_epi64(i8 zeroext %__M, <8 x i64> %__W) {
; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X86-NEXT: vpminsq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm0
@ -8160,7 +8160,7 @@ define i64 @test_mm512_mask_reduce_min_epi64(i8 zeroext %__M, <8 x i64> %__W) {
; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X64-NEXT: vpminsq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm0
@ -8192,7 +8192,7 @@ define i64 @test_mm512_mask_reduce_min_epu64(i8 zeroext %__M, <8 x i64> %__W) {
; X86-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X86-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X86-NEXT: vpminuq %zmm0, %zmm1, %zmm0
; X86-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X86-NEXT: vextracti128 $1, %ymm0, %xmm1
; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm0
; X86-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm0
@ -8208,7 +8208,7 @@ define i64 @test_mm512_mask_reduce_min_epu64(i8 zeroext %__M, <8 x i64> %__W) {
; X64-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1}
; X64-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm1[4,5,6,7,0,1,2,3]
; X64-NEXT: vpminuq %zmm0, %zmm1, %zmm0
; X64-NEXT: vpermq {{.*#+}} zmm1 = zmm0[2,3,0,1,6,7,4,5]
; X64-NEXT: vextracti128 $1, %ymm0, %xmm1
; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm0
; X64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm0

6
test/CodeGen/X86/known-signbits-vector.ll
View File

@ -256,9 +256,8 @@ define <4 x double> @signbits_sext_shuffle_sitofp(<4 x i32> %a0, <4 x i64> %a1)
; X86-NEXT: vpmovsxdq %xmm0, %xmm0
; X86-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X86-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2]
; X86-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
; X86-NEXT: vextractf128 $1, %ymm0, %xmm1
; X86-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; X86-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[0,2]
; X86-NEXT: vcvtdq2pd %xmm0, %ymm0
; X86-NEXT: retl
;
@ -269,9 +268,8 @@ define <4 x double> @signbits_sext_shuffle_sitofp(<4 x i32> %a0, <4 x i64> %a1)
; X64-AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
; X64-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-AVX1-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,3,2]
; X64-AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
; X64-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; X64-AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[0,2]
; X64-AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0
; X64-AVX1-NEXT: retq
;

18
test/CodeGen/X86/packss.ll
View File

@ -356,18 +356,12 @@ define <32 x i8> @packsswb_icmp_zero_trunc_256(<16 x i16> %a0) {
;
; AVX1-LABEL: packsswb_icmp_zero_trunc_256:
; AVX1: # %bb.0:
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
; AVX1-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpcmpeqw %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = zero,zero,ymm0[0,1]
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm1
; AVX1-NEXT: vpacksswb %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: ret{{[l|q]}}
;

8
test/CodeGen/X86/var-permute-256.ll
View File

@ -1104,18 +1104,18 @@ entry:
define <4 x i32> @var_shuffle_v4i32_from_v8i32(<8 x i32> %v, <4 x i32> %indices) unnamed_addr nounwind {
; XOP-LABEL: var_shuffle_v4i32_from_v8i32:
; XOP: # %bb.0: # %entry
; XOP-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3,2,3]
; XOP-NEXT: vextractf128 $1, %ymm0, %xmm2
; XOP-NEXT: vpermil2ps $0, %xmm1, %xmm2, %xmm0, %xmm0
; XOP-NEXT: vzeroupper
; XOP-NEXT: retq
;
; AVX1-LABEL: var_shuffle_v4i32_from_v8i32:
; AVX1: # %bb.0: # %entry
; AVX1-NEXT: vpermilps %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpermilps %xmm1, %xmm2, %xmm2
; AVX1-NEXT: vpermilps %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpcmpgtd {{.*}}(%rip), %xmm1, %xmm1
; AVX1-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0
; AVX1-NEXT: vblendvps %xmm1, %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;

42
test/CodeGen/X86/vector-pack-256.ll
View File

@ -49,16 +49,14 @@ define <16 x i16> @trunc_concat_packssdw_256(<8 x i32> %a0, <8 x i32> %a1) nounw
define <16 x i16> @trunc_concat_packusdw_256(<8 x i32> %a0, <8 x i32> %a1) nounwind {
; AVX1-LABEL: trunc_concat_packusdw_256:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpsrld $17, %xmm2, %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm2
; AVX1-NEXT: vpsrld $17, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpsrld $17, %xmm0, %xmm0
; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm2[2,3],ymm1[2,3]
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX1-NEXT: vpackusdw %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackusdw %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc_concat_packusdw_256:
@ -91,16 +89,14 @@ define <16 x i16> @trunc_concat_packusdw_256(<8 x i32> %a0, <8 x i32> %a1) nounw
define <32 x i8> @trunc_concat_packsswb_256(<16 x i16> %a0, <16 x i16> %a1) nounwind {
; AVX1-LABEL: trunc_concat_packsswb_256:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpsraw $15, %xmm2, %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm2
; AVX1-NEXT: vpsraw $15, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm2[2,3],ymm1[2,3]
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX1-NEXT: vpacksswb %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpacksswb %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc_concat_packsswb_256:
@ -145,16 +141,14 @@ define <32 x i8> @trunc_concat_packsswb_256(<16 x i16> %a0, <16 x i16> %a1) noun
define <32 x i8> @trunc_concat_packuswb_256(<16 x i16> %a0, <16 x i16> %a1) nounwind {
; AVX1-LABEL: trunc_concat_packuswb_256:
; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vpsrlw $15, %xmm2, %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm2
; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm0
; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm2[2,3],ymm1[2,3]
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2
; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0
; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc_concat_packuswb_256:

452
test/CodeGen/X86/x86-interleaved-access.ll
View File

@ -584,279 +584,265 @@ define <16 x i1> @interleaved_load_vf16_i8_stride4(<64 x i8>* %ptr) {
define <32 x i1> @interleaved_load_vf32_i8_stride4(<128 x i8>* %ptr) {
; AVX1-LABEL: interleaved_load_vf32_i8_stride4:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vmovdqa 112(%rdi), %xmm11
; AVX1-NEXT: vpshufb %xmm0, %xmm11, %xmm1
; AVX1-NEXT: vmovdqa 96(%rdi), %xmm12
; AVX1-NEXT: vpshufb %xmm0, %xmm12, %xmm3
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vmovdqa 80(%rdi), %xmm14
; AVX1-NEXT: vpshufb %xmm2, %xmm14, %xmm4
; AVX1-NEXT: vmovdqa 64(%rdi), %xmm6
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm5
; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vmovdqa (%rdi), %xmm10
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm11
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm12
; AVX1-NEXT: vmovdqa 48(%rdi), %xmm13
; AVX1-NEXT: vpshufb %xmm6, %xmm13, %xmm4
; AVX1-NEXT: vpshufb %xmm6, %xmm12, %xmm5
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm4[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm8
; AVX1-NEXT: vmovdqa (%rdi), %xmm13
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm15
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm7
; AVX1-NEXT: vmovdqa 48(%rdi), %xmm5
; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm1
; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm0, %xmm11, %xmm5
; AVX1-NEXT: vpshufb %xmm0, %xmm10, %xmm7
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm8 = xmm5[0,1,2,3],xmm4[4,5,6,7]
; AVX1-NEXT: vmovdqa 112(%rdi), %xmm14
; AVX1-NEXT: vpshufb %xmm6, %xmm14, %xmm7
; AVX1-NEXT: vmovdqa 96(%rdi), %xmm5
; AVX1-NEXT: vpshufb %xmm6, %xmm5, %xmm6
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
; AVX1-NEXT: vmovdqa 80(%rdi), %xmm6
; AVX1-NEXT: vpshufb %xmm0, %xmm6, %xmm2
; AVX1-NEXT: vmovdqa 64(%rdi), %xmm7
; AVX1-NEXT: vpshufb %xmm0, %xmm7, %xmm0
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX1-NEXT: vpshufb %xmm2, %xmm15, %xmm1
; AVX1-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm9 = xmm0[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm1, %xmm13, %xmm2
; AVX1-NEXT: vpshufb %xmm1, %xmm12, %xmm0
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm2, %xmm11, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm10, %xmm4
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vpcmpeqb %xmm0, %xmm8, %xmm0
; AVX1-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX1-NEXT: vpshufb %xmm1, %xmm14, %xmm0
; AVX1-NEXT: vpshufb %xmm1, %xmm5, %xmm1
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm1
; AVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vblendps {{.*#+}} ymm8 = ymm0[0,1,2,3],ymm8[4,5,6,7]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm0, %xmm11, %xmm1
; AVX1-NEXT: vpshufb %xmm0, %xmm12, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm2, %xmm14, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm4
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm3
; AVX1-NEXT: vpshufb %xmm0, %xmm7, %xmm0
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX1-NEXT: vpshufb %xmm2, %xmm15, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vblendps {{.*#+}} ymm9 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX1-NEXT: vpcmpeqb %xmm0, %xmm9, %xmm9
; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,2,6,10,14,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm0, %xmm11, %xmm1
; AVX1-NEXT: vpshufb %xmm0, %xmm13, %xmm1
; AVX1-NEXT: vpshufb %xmm0, %xmm12, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm2, %xmm14, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm4
; AVX1-NEXT: vpshufb %xmm2, %xmm11, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm10, %xmm4
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm3
; AVX1-NEXT: vpshufb %xmm0, %xmm7, %xmm0
; AVX1-NEXT: vpblendw {{.*#+}} xmm8 = xmm3[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vpshufb %xmm0, %xmm14, %xmm3
; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm0
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX1-NEXT: vpshufb %xmm2, %xmm15, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vblendps {{.*#+}} ymm10 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm0, %xmm11, %xmm1
; AVX1-NEXT: vpshufb %xmm0, %xmm12, %xmm2
; AVX1-NEXT: vpblendw {{.*#+}} xmm15 = xmm2[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm2, %xmm13, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm12, %xmm4
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm4, %xmm11, %xmm0
; AVX1-NEXT: vpshufb %xmm4, %xmm10, %xmm1
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
; AVX1-NEXT: vpcmpeqb %xmm0, %xmm8, %xmm0
; AVX1-NEXT: vpshufb %xmm2, %xmm14, %xmm1
; AVX1-NEXT: vpshufb %xmm2, %xmm5, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm2, %xmm14, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm4
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm3[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX1-NEXT: vpshufb %xmm0, %xmm5, %xmm3
; AVX1-NEXT: vpshufb %xmm0, %xmm7, %xmm0
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX1-NEXT: vpshufb %xmm2, %xmm15, %xmm3
; AVX1-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX1-NEXT: vextractf128 $1, %ymm9, %xmm1
; AVX1-NEXT: vextractf128 $1, %ymm8, %xmm2
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm2, %xmm1
; AVX1-NEXT: vpcmpeqb %xmm9, %xmm8, %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm10, %xmm3
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm3, %xmm2
; AVX1-NEXT: vpcmpeqb %xmm0, %xmm10, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vxorps %ymm0, %ymm1, %ymm0
; AVX1-NEXT: vpshufb %xmm4, %xmm6, %xmm2
; AVX1-NEXT: vpshufb %xmm4, %xmm7, %xmm3
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm15, %xmm1
; AVX1-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm2 # 32-byte Reload
; AVX1-NEXT: vinsertf128 $1, %xmm9, %ymm2, %ymm2
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vxorps %ymm0, %ymm2, %ymm0
; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_load_vf32_i8_stride4:
; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqa (%rdi), %xmm9
; AVX2-NEXT: vmovdqa 16(%rdi), %xmm11
; AVX2-NEXT: vmovdqa 32(%rdi), %xmm12
; AVX2-NEXT: vmovdqa 48(%rdi), %xmm13
; AVX2-NEXT: vmovdqa {{.*#+}} xmm6 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm6, %xmm13, %xmm4
; AVX2-NEXT: vpshufb %xmm6, %xmm12, %xmm5
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm0 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm0, %xmm11, %xmm5
; AVX2-NEXT: vpshufb %xmm0, %xmm9, %xmm7
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm7[0],xmm5[0],xmm7[1],xmm5[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm8 = xmm5[0,1],xmm4[2,3]
; AVX2-NEXT: vmovdqa 112(%rdi), %xmm14
; AVX2-NEXT: vpshufb %xmm6, %xmm14, %xmm7
; AVX2-NEXT: vpermq {{.*#+}} ymm5 = mem[2,3,0,1]
; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm5
; AVX2-NEXT: vpshufb %xmm6, %xmm5, %xmm6
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1]
; AVX2-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm10
; AVX2-NEXT: vmovdqa 80(%rdi), %xmm6
; AVX2-NEXT: vpshufb %xmm0, %xmm6, %xmm1
; AVX2-NEXT: vpermq {{.*#+}} ymm7 = mem[2,3,0,1]
; AVX2-NEXT: vextracti128 $1, %ymm7, %xmm7
; AVX2-NEXT: vpshufb %xmm0, %xmm7, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm10[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm8 = ymm8[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm1, %xmm13, %xmm0
; AVX2-NEXT: vpshufb %xmm1, %xmm12, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm2, %xmm11, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm9, %xmm4
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm3[0,1],xmm0[2,3]
; AVX2-NEXT: vpshufb %xmm1, %xmm14, %xmm3
; AVX2-NEXT: vpshufb %xmm1, %xmm5, %xmm1
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vmovdqa 112(%rdi), %xmm9
; AVX2-NEXT: vpshufb %xmm0, %xmm9, %xmm1
; AVX2-NEXT: vmovdqa 96(%rdi), %xmm10
; AVX2-NEXT: vpshufb %xmm0, %xmm10, %xmm3
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpshufb %xmm2, %xmm6, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vmovdqa 80(%rdi), %xmm12
; AVX2-NEXT: vpshufb %xmm2, %xmm12, %xmm4
; AVX2-NEXT: vmovdqa 64(%rdi), %xmm5
; AVX2-NEXT: vpshufb %xmm2, %xmm5, %xmm6
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
; AVX2-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
; AVX2-NEXT: vpblendd {{.*#+}} ymm8 = ymm4[0,1,2,3,4,5],ymm1[6,7]
; AVX2-NEXT: vmovdqa (%rdi), %xmm11
; AVX2-NEXT: vmovdqa 16(%rdi), %xmm13
; AVX2-NEXT: vmovdqa 32(%rdi), %xmm6
; AVX2-NEXT: vmovdqa 48(%rdi), %xmm7
; AVX2-NEXT: vpshufb %xmm0, %xmm7, %xmm1
; AVX2-NEXT: vpshufb %xmm0, %xmm6, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; AVX2-NEXT: vpshufb %xmm2, %xmm13, %xmm1
; AVX2-NEXT: vpshufb %xmm2, %xmm11, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm8 = ymm0[0,1,2,3],ymm8[4,5,6,7]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm1, %xmm9, %xmm2
; AVX2-NEXT: vpshufb %xmm1, %xmm10, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm2, %xmm12, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm5, %xmm4
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm3[0,1,2,3,4,5],ymm0[6,7]
; AVX2-NEXT: vpshufb %xmm1, %xmm7, %xmm3
; AVX2-NEXT: vpshufb %xmm1, %xmm6, %xmm1
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; AVX2-NEXT: vpshufb %xmm2, %xmm13, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm11, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3,4,5],ymm1[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: vpcmpeqb %ymm0, %ymm8, %ymm8
; AVX2-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,2,6,10,14,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm0, %xmm13, %xmm1
; AVX2-NEXT: vpshufb %xmm0, %xmm12, %xmm2
; AVX2-NEXT: vpshufb %xmm0, %xmm9, %xmm1
; AVX2-NEXT: vpshufb %xmm0, %xmm10, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm2, %xmm11, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm9, %xmm4
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3]
; AVX2-NEXT: vpshufb %xmm0, %xmm14, %xmm3
; AVX2-NEXT: vpshufb %xmm0, %xmm5, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX2-NEXT: vpshufb %xmm2, %xmm6, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1,2,3,4,5],ymm0[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm10 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm1, %xmm13, %xmm2
; AVX2-NEXT: vpshufb %xmm1, %xmm12, %xmm3
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm3, %xmm11, %xmm4
; AVX2-NEXT: vpshufb %xmm3, %xmm9, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
; AVX2-NEXT: vpshufb %xmm1, %xmm14, %xmm2
; AVX2-NEXT: vpshufb %xmm1, %xmm5, %xmm1
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpshufb %xmm3, %xmm6, %xmm2
; AVX2-NEXT: vpshufb %xmm3, %xmm7, %xmm3
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm2, %xmm12, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm5, %xmm4
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2,3,4,5],ymm1[6,7]
; AVX2-NEXT: vpshufb %xmm0, %xmm7, %xmm3
; AVX2-NEXT: vpshufb %xmm0, %xmm6, %xmm0
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX2-NEXT: vpshufb %xmm2, %xmm13, %xmm3
; AVX2-NEXT: vpshufb %xmm2, %xmm11, %xmm2
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm1, %xmm9, %xmm2
; AVX2-NEXT: vpshufb %xmm1, %xmm10, %xmm3
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3,4,5],ymm1[6,7]
; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7]
; AVX2-NEXT: vpcmpeqb %ymm0, %ymm10, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX2-NEXT: vpshufb %xmm3, %xmm12, %xmm4
; AVX2-NEXT: vpshufb %xmm3, %xmm5, %xmm5
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX2-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm4[0,1,2,3,4,5],ymm2[6,7]
; AVX2-NEXT: vpshufb %xmm1, %xmm7, %xmm4
; AVX2-NEXT: vpshufb %xmm1, %xmm6, %xmm1
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
; AVX2-NEXT: vpshufb %xmm3, %xmm13, %xmm4
; AVX2-NEXT: vpshufb %xmm3, %xmm11, %xmm3
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3]
; AVX2-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm2[4,5,6,7]
; AVX2-NEXT: vpcmpeqb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpxor %ymm0, %ymm8, %ymm0
; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_load_vf32_i8_stride4:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa 112(%rdi), %xmm10
; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm2, %xmm10, %xmm3
; AVX512-NEXT: vpermq {{.*#+}} ymm1 = mem[2,3,0,1]
; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm11
; AVX512-NEXT: vpshufb %xmm2, %xmm11, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm4
; AVX512-NEXT: vmovdqa 80(%rdi), %xmm12
; AVX512-NEXT: vmovdqa 112(%rdi), %xmm11
; AVX512-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm0, %xmm11, %xmm3
; AVX512-NEXT: vmovdqa 96(%rdi), %xmm13
; AVX512-NEXT: vpshufb %xmm0, %xmm13, %xmm0
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX512-NEXT: vmovdqa 80(%rdi), %xmm14
; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm5, %xmm12, %xmm6
; AVX512-NEXT: vpermq {{.*#+}} ymm3 = mem[2,3,0,1]
; AVX512-NEXT: vextracti128 $1, %ymm3, %xmm13
; AVX512-NEXT: vpshufb %xmm5, %xmm13, %xmm5
; AVX512-NEXT: vpshufb %xmm5, %xmm14, %xmm6
; AVX512-NEXT: vmovdqa 64(%rdi), %xmm4
; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1]
; AVX512-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
; AVX512-NEXT: vpblendd {{.*#+}} ymm4 = ymm5[0,1,2,3,4,5],ymm4[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm5[0,1,2,3,4,5],ymm0[6,7]
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm5
; AVX512-NEXT: vpmovdb %zmm5, %xmm5
; AVX512-NEXT: vpblendd {{.*#+}} ymm9 = ymm5[0,1,2,3],ymm4[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vmovdqa (%rdi), %xmm14
; AVX512-NEXT: vmovdqa 16(%rdi), %xmm6
; AVX512-NEXT: vpblendd {{.*#+}} ymm9 = ymm5[0,1,2,3],ymm0[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = <u,u,u,u,1,5,9,13,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm5, %xmm11, %xmm0
; AVX512-NEXT: vpshufb %xmm5, %xmm13, %xmm6
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm6[0],xmm0[0],xmm6[1],xmm0[1]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm1, %xmm14, %xmm6
; AVX512-NEXT: vpshufb %xmm1, %xmm4, %xmm7
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[1],xmm6[1]
; AVX512-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm6
; AVX512-NEXT: vpblendd {{.*#+}} ymm8 = ymm6[0,1,2,3,4,5],ymm0[6,7]
; AVX512-NEXT: vmovdqa (%rdi), %xmm10
; AVX512-NEXT: vmovdqa 16(%rdi), %xmm12
; AVX512-NEXT: vmovdqa 32(%rdi), %xmm7
; AVX512-NEXT: vmovdqa 48(%rdi), %xmm4
; AVX512-NEXT: vpshufb %xmm0, %xmm4, %xmm1
; AVX512-NEXT: vpshufb %xmm0, %xmm7, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <1,5,9,13,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm2, %xmm6, %xmm3
; AVX512-NEXT: vpshufb %xmm2, %xmm14, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3]
; AVX512-NEXT: vpshufb %xmm0, %xmm10, %xmm3
; AVX512-NEXT: vpshufb %xmm0, %xmm11, %xmm0
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX512-NEXT: vpshufb %xmm2, %xmm12, %xmm3
; AVX512-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1,2,3,4,5],ymm0[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm8 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm0 = <u,u,u,u,2,6,10,14,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm0, %xmm4, %xmm1
; AVX512-NEXT: vpshufb %xmm0, %xmm7, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm2, %xmm6, %xmm3
; AVX512-NEXT: vpshufb %xmm2, %xmm14, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3]
; AVX512-NEXT: vpshufb %xmm0, %xmm10, %xmm3
; AVX512-NEXT: vpshufb %xmm0, %xmm11, %xmm0
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
; AVX512-NEXT: vpshufb %xmm2, %xmm12, %xmm3
; AVX512-NEXT: vpshufb %xmm2, %xmm13, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0,1,2,3,4,5],ymm0[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm1, %xmm4, %xmm2
; AVX512-NEXT: vpshufb %xmm1, %xmm7, %xmm3
; AVX512-NEXT: vmovdqa 48(%rdi), %xmm0
; AVX512-NEXT: vpshufb %xmm5, %xmm0, %xmm6
; AVX512-NEXT: vpshufb %xmm5, %xmm7, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1]
; AVX512-NEXT: vpshufb %xmm1, %xmm12, %xmm6
; AVX512-NEXT: vpshufb %xmm1, %xmm10, %xmm1
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0,1],xmm5[2,3]
; AVX512-NEXT: vpblendd {{.*#+}} ymm8 = ymm1[0,1,2,3],ymm8[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = <u,u,u,u,2,6,10,14,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm1, %xmm11, %xmm5
; AVX512-NEXT: vpshufb %xmm1, %xmm13, %xmm6
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm5 = xmm6[0],xmm5[0],xmm6[1],xmm5[1]
; AVX512-NEXT: vinserti128 $1, %xmm5, %ymm0, %ymm5
; AVX512-NEXT: vmovdqa {{.*#+}} xmm6 = <2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm6, %xmm14, %xmm2
; AVX512-NEXT: vpshufb %xmm6, %xmm4, %xmm3
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm3, %xmm6, %xmm4
; AVX512-NEXT: vpshufb %xmm3, %xmm14, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm2 = xmm4[0,1],xmm2[2,3]
; AVX512-NEXT: vpshufb %xmm1, %xmm10, %xmm4
; AVX512-NEXT: vpshufb %xmm1, %xmm11, %xmm1
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1]
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
; AVX512-NEXT: vpshufb %xmm3, %xmm12, %xmm4
; AVX512-NEXT: vpshufb %xmm3, %xmm13, %xmm3
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
; AVX512-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm2
; AVX512-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3,4,5],ymm5[6,7]
; AVX512-NEXT: vpshufb %xmm1, %xmm0, %xmm3
; AVX512-NEXT: vpshufb %xmm1, %xmm7, %xmm1
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
; AVX512-NEXT: vpshufb %xmm6, %xmm12, %xmm3
; AVX512-NEXT: vpshufb %xmm6, %xmm10, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm3[0,1],xmm1[2,3]
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm2[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <u,u,u,u,3,7,11,15,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm2, %xmm11, %xmm3
; AVX512-NEXT: vpshufb %xmm2, %xmm13, %xmm5
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
; AVX512-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm3
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm3[0,1,2,3,4,5],ymm1[6,7]
; AVX512-NEXT: vpblendd {{.*#+}} ymm1 = ymm2[0,1,2,3],ymm1[4,5,6,7]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm5 = <3,7,11,15,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpshufb %xmm5, %xmm14, %xmm6
; AVX512-NEXT: vpshufb %xmm5, %xmm4, %xmm4
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1]
; AVX512-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm4
; AVX512-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3,4,5],ymm3[6,7]
; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0
; AVX512-NEXT: vpshufb %xmm2, %xmm7, %xmm2
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
; AVX512-NEXT: vpshufb %xmm5, %xmm12, %xmm2
; AVX512-NEXT: vpshufb %xmm5, %xmm10, %xmm4
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3]
; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm3[4,5,6,7]
; AVX512-NEXT: vpcmpeqb %zmm8, %zmm9, %k0
; AVX512-NEXT: vpcmpeqb %zmm1, %zmm0, %k1
; AVX512-NEXT: vpcmpeqb %zmm0, %zmm1, %k1
; AVX512-NEXT: kxnord %k1, %k0, %k0
; AVX512-NEXT: vpmovm2b %k0, %zmm0
; AVX512-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0