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[WebAssembly] Update for spec change from tableswitch to br_table.
Also note that the operand order changed; the default label is now listed after the regular labels. llvm-svn: 262903
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@ -32,7 +32,7 @@ Interesting work that remains to be done:
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//===---------------------------------------------------------------------===//
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Br, br_if, and tableswitch instructions can support having a value on the
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Br, br_if, and br_table instructions can support having a value on the
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expression stack across the jump (sometimes). We should (a) model this, and
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(b) extend the stackifier to utilize it.
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@ -20,6 +20,6 @@ HANDLE_NODETYPE(RETURN)
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HANDLE_NODETYPE(ARGUMENT)
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HANDLE_NODETYPE(Wrapper)
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HANDLE_NODETYPE(BR_IF)
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HANDLE_NODETYPE(TABLESWITCH)
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HANDLE_NODETYPE(BR_TABLE)
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// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
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@ -631,7 +631,7 @@ SDValue WebAssemblyTargetLowering::LowerExternalSymbol(
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SDValue WebAssemblyTargetLowering::LowerJumpTable(SDValue Op,
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SelectionDAG &DAG) const {
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// There's no need for a Wrapper node because we always incorporate a jump
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// table operand into a TABLESWITCH instruction, rather than ever
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// table operand into a BR_TABLE instruction, rather than ever
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// materializing it in a register.
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const JumpTableSDNode *JT = cast<JumpTableSDNode>(Op);
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return DAG.getTargetJumpTable(JT->getIndex(), Op.getValueType(),
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@ -653,15 +653,15 @@ SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op,
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MachineJumpTableInfo *MJTI = DAG.getMachineFunction().getJumpTableInfo();
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const auto &MBBs = MJTI->getJumpTables()[JT->getIndex()].MBBs;
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// Add an operand for each case.
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for (auto MBB : MBBs) Ops.push_back(DAG.getBasicBlock(MBB));
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// TODO: For now, we just pick something arbitrary for a default case for now.
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// We really want to sniff out the guard and put in the real default case (and
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// delete the guard).
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Ops.push_back(DAG.getBasicBlock(MBBs[0]));
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// Add an operand for each case.
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for (auto MBB : MBBs) Ops.push_back(DAG.getBasicBlock(MBB));
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return DAG.getNode(WebAssemblyISD::TABLESWITCH, DL, MVT::Other, Ops);
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return DAG.getNode(WebAssemblyISD::BR_TABLE, DL, MVT::Other, Ops);
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}
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SDValue WebAssemblyTargetLowering::LowerVASTART(SDValue Op,
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@ -39,20 +39,20 @@ def : Pat<(brcond (i32 (seteq I32:$cond, 0)), bb:$dst),
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let Defs = [ARGUMENTS] in {
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// TODO: SelectionDAG's lowering insists on using a pointer as the index for
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// jump tables, so in practice we don't ever use TABLESWITCH_I64 in wasm32 mode
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// jump tables, so in practice we don't ever use BR_TABLE_I64 in wasm32 mode
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// currently.
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// Set TSFlags{0} to 1 to indicate that the variable_ops are immediates.
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// Set TSFlags{1} to 1 to indicate that the immediates represent labels.
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let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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def TABLESWITCH_I32 : I<(outs), (ins I32:$index, bb_op:$default, variable_ops),
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[(WebAssemblytableswitch I32:$index, bb:$default)],
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"tableswitch\t$index, $default"> {
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def BR_TABLE_I32 : I<(outs), (ins I32:$index, variable_ops),
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[(WebAssemblybr_table I32:$index)],
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"br_table \t$index"> {
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let TSFlags{0} = 1;
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let TSFlags{1} = 1;
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}
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def TABLESWITCH_I64 : I<(outs), (ins I64:$index, bb_op:$default, variable_ops),
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[(WebAssemblytableswitch I64:$index, bb:$default)],
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"tableswitch\t$index, $default"> {
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def BR_TABLE_I64 : I<(outs), (ins I64:$index, variable_ops),
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[(WebAssemblybr_table I64:$index)],
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"br_table \t$index"> {
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let TSFlags{0} = 1;
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let TSFlags{1} = 1;
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}
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@ -30,7 +30,7 @@ def SDT_WebAssemblyCallSeqEnd :
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SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
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def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
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def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
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def SDT_WebAssemblyTableswitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
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def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
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def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
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def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
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def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
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@ -52,8 +52,8 @@ def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
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def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
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SDT_WebAssemblyCall1,
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[SDNPHasChain, SDNPVariadic]>;
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def WebAssemblytableswitch : SDNode<"WebAssemblyISD::TABLESWITCH",
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SDT_WebAssemblyTableswitch,
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def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE",
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SDT_WebAssemblyBrTable,
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[SDNPHasChain, SDNPVariadic]>;
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def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
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SDT_WebAssemblyArgument>;
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@ -895,7 +895,7 @@ end:
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; CHECK-NOT: block
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; CHECK: br_if 5, {{[^,]+}}{{$}}
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; CHECK-NOT: block
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; CHECK: tableswitch {{[^,]+}}, 0, 0, 1, 5, 2, 4{{$}}
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; CHECK: br_table {{[^,]+}}, 0, 1, 5, 2, 4, 0{{$}}
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; CHECK-NEXT: .LBB19_5:
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; CHECK-NEXT: end_loop{{$}}
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; CHECK-NEXT: end_loop{{$}}
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@ -919,7 +919,7 @@ end:
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; OPT-NOT: block
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; OPT: br_if 5, {{[^,]+}}{{$}}
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; OPT-NOT: block
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; OPT: tableswitch {{[^,]+}}, 0, 0, 1, 5, 2, 4{{$}}
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; OPT: br_table {{[^,]+}}, 0, 1, 5, 2, 4, 0{{$}}
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; OPT-NEXT: .LBB19_5:
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; OPT-NEXT: end_loop{{$}}
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; OPT-NEXT: end_loop{{$}}
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@ -21,7 +21,7 @@ declare void @foo5()
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; CHECK: block{{$}}
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; CHECK: block{{$}}
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; CHECK: block{{$}}
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; CHECK: tableswitch {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5{{$}}
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; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
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; CHECK: .LBB0_2:
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; CHECK: call foo0@FUNCTION{{$}}
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; CHECK: .LBB0_3:
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@ -101,7 +101,7 @@ sw.epilog: ; preds = %entry, %sw.bb.5, %s
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; CHECK: block{{$}}
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; CHECK: block{{$}}
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; CHECK: block{{$}}
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; CHECK: tableswitch {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5{{$}}
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; CHECK: br_table {{[^,]+}}, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 4, 5, 0{{$}}
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; CHECK: .LBB1_2:
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; CHECK: call foo0@FUNCTION{{$}}
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; CHECK: .LBB1_3:
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