mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 11:13:28 +01:00
[X86] Standardize BROADCAST enum names (PR31079)
Tweak EVEX implementation names so it matches the other variants by adding the 'r' prefix. Oddly some of the subvec broadcast ops already matched.
This commit is contained in:
Simon Pilgrim
parent
230f67c40c
commit
8ef6412f67
@ -1178,28 +1178,28 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
|
||||
DecodeSubVectorBroadcast(16, 8, ShuffleMask);
|
||||
DestName = getRegName(MI->getOperand(0).getReg());
|
||||
break;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, r)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rr)
|
||||
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
|
||||
LLVM_FALLTHROUGH;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, m)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, rm)
|
||||
DecodeSubVectorBroadcast(4, 2, ShuffleMask);
|
||||
DestName = getRegName(MI->getOperand(0).getReg());
|
||||
break;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, r)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, r)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rr)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rr)
|
||||
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
|
||||
LLVM_FALLTHROUGH;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, m)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, m)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, rm)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, rm)
|
||||
DecodeSubVectorBroadcast(8, 2, ShuffleMask);
|
||||
DestName = getRegName(MI->getOperand(0).getReg());
|
||||
break;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, r)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, r)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rr)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rr)
|
||||
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
|
||||
LLVM_FALLTHROUGH;
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, m)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, m)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z, rm)
|
||||
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z, rm)
|
||||
DecodeSubVectorBroadcast(16, 2, ShuffleMask);
|
||||
DestName = getRegName(MI->getOperand(0).getReg());
|
||||
break;
|
||||
|
||||
@ -1101,18 +1101,18 @@ multiclass avx512_broadcast_scalar<bits<8> opc, string OpcodeStr,
|
||||
string Name,
|
||||
X86VectorVTInfo DestInfo, X86VectorVTInfo SrcInfo> {
|
||||
def : Pat<(DestInfo.VT (X86VBroadcast SrcInfo.FRC:$src)),
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#r)
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#rr)
|
||||
(SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
|
||||
def : Pat<(DestInfo.VT (vselect DestInfo.KRCWM:$mask,
|
||||
(X86VBroadcast SrcInfo.FRC:$src),
|
||||
DestInfo.RC:$src0)),
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#rk)
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#rrk)
|
||||
DestInfo.RC:$src0, DestInfo.KRCWM:$mask,
|
||||
(SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
|
||||
def : Pat<(DestInfo.VT (vselect DestInfo.KRCWM:$mask,
|
||||
(X86VBroadcast SrcInfo.FRC:$src),
|
||||
DestInfo.ImmAllZerosV)),
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#rkz)
|
||||
(!cast<Instruction>(Name#DestInfo.ZSuffix#rrkz)
|
||||
DestInfo.KRCWM:$mask, (SrcInfo.VT (COPY_TO_REGCLASS SrcInfo.FRC:$src, SrcInfo.RC)))>;
|
||||
}
|
||||
|
||||
@ -1128,83 +1128,83 @@ multiclass avx512_broadcast_rm_split<bits<8> opc, string OpcodeStr,
|
||||
SDPatternOperator UnmaskedOp = X86VBroadcast,
|
||||
SDPatternOperator UnmaskedBcastOp = SrcInfo.BroadcastLdFrag> {
|
||||
let hasSideEffects = 0 in
|
||||
def r : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst), (ins SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(UnmaskedOp (SrcInfo.VT SrcInfo.RC:$src))))))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, Sched<[SchedRR]>;
|
||||
def rkz : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.KRCWM:$mask, SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}} {z}|",
|
||||
"${dst} {${mask}} {z}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(X86VBroadcast (SrcInfo.VT SrcInfo.RC:$src))))),
|
||||
MaskInfo.ImmAllZerosV))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_KZ, Sched<[SchedRR]>;
|
||||
let Constraints = "$src0 = $dst" in
|
||||
def rk : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.RC:$src0, MaskInfo.KRCWM:$mask,
|
||||
SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}}|",
|
||||
"${dst} {${mask}}, $src}"),
|
||||
def rr : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst), (ins SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(X86VBroadcast (SrcInfo.VT SrcInfo.RC:$src))))),
|
||||
MaskInfo.RC:$src0))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_K, Sched<[SchedRR]>;
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(UnmaskedOp (SrcInfo.VT SrcInfo.RC:$src))))))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, Sched<[SchedRR]>;
|
||||
def rrkz : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.KRCWM:$mask, SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}} {z}|",
|
||||
"${dst} {${mask}} {z}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(X86VBroadcast (SrcInfo.VT SrcInfo.RC:$src))))),
|
||||
MaskInfo.ImmAllZerosV))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_KZ, Sched<[SchedRR]>;
|
||||
let Constraints = "$src0 = $dst" in
|
||||
def rrk : AVX512PI<opc, MRMSrcReg, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.RC:$src0, MaskInfo.KRCWM:$mask,
|
||||
SrcInfo.RC:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}}|",
|
||||
"${dst} {${mask}}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(X86VBroadcast (SrcInfo.VT SrcInfo.RC:$src))))),
|
||||
MaskInfo.RC:$src0))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_K, Sched<[SchedRR]>;
|
||||
|
||||
let hasSideEffects = 0, mayLoad = 1 in
|
||||
def m : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(UnmaskedBcastOp addr:$src)))))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
def rm : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(UnmaskedBcastOp addr:$src)))))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
|
||||
def mkz : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.KRCWM:$mask, SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}} {z}|",
|
||||
"${dst} {${mask}} {z}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(SrcInfo.BroadcastLdFrag addr:$src)))),
|
||||
MaskInfo.ImmAllZerosV))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_KZ,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
def rmkz : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.KRCWM:$mask, SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}} {z}|",
|
||||
"${dst} {${mask}} {z}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(SrcInfo.BroadcastLdFrag addr:$src)))),
|
||||
MaskInfo.ImmAllZerosV))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_KZ,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
|
||||
let Constraints = "$src0 = $dst",
|
||||
isConvertibleToThreeAddress = IsConvertibleToThreeAddress in
|
||||
def mk : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.RC:$src0, MaskInfo.KRCWM:$mask,
|
||||
SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}}|",
|
||||
"${dst} {${mask}}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(SrcInfo.BroadcastLdFrag addr:$src)))),
|
||||
MaskInfo.RC:$src0))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_K,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
def rmk : AVX512PI<opc, MRMSrcMem, (outs MaskInfo.RC:$dst),
|
||||
(ins MaskInfo.RC:$src0, MaskInfo.KRCWM:$mask,
|
||||
SrcInfo.ScalarMemOp:$src),
|
||||
!strconcat(OpcodeStr, "\t{$src, ${dst} {${mask}}|",
|
||||
"${dst} {${mask}}, $src}"),
|
||||
[(set MaskInfo.RC:$dst,
|
||||
(vselect MaskInfo.KRCWM:$mask,
|
||||
(MaskInfo.VT
|
||||
(bitconvert
|
||||
(DestInfo.VT
|
||||
(SrcInfo.BroadcastLdFrag addr:$src)))),
|
||||
MaskInfo.RC:$src0))],
|
||||
DestInfo.ExeDomain>, T8PD, EVEX, EVEX_K,
|
||||
EVEX_CD8<SrcInfo.EltSize, CD8VT1>, Sched<[SchedRM]>;
|
||||
}
|
||||
|
||||
// Helper class to force mask and broadcast result to same type.
|
||||
@ -1268,34 +1268,34 @@ multiclass avx512_int_broadcast_reg<bits<8> opc, SchedWrite SchedRR,
|
||||
X86VectorVTInfo _, SDPatternOperator OpNode,
|
||||
RegisterClass SrcRC> {
|
||||
let ExeDomain = _.ExeDomain in
|
||||
defm r : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
|
||||
(ins SrcRC:$src),
|
||||
"vpbroadcast"##_.Suffix, "$src", "$src",
|
||||
(_.VT (OpNode SrcRC:$src))>, T8PD, EVEX,
|
||||
Sched<[SchedRR]>;
|
||||
defm rr : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
|
||||
(ins SrcRC:$src),
|
||||
"vpbroadcast"##_.Suffix, "$src", "$src",
|
||||
(_.VT (OpNode SrcRC:$src))>, T8PD, EVEX,
|
||||
Sched<[SchedRR]>;
|
||||
}
|
||||
|
||||
multiclass avx512_int_broadcastbw_reg<bits<8> opc, string Name, SchedWrite SchedRR,
|
||||
X86VectorVTInfo _, SDPatternOperator OpNode,
|
||||
RegisterClass SrcRC, SubRegIndex Subreg> {
|
||||
let hasSideEffects = 0, ExeDomain = _.ExeDomain in
|
||||
defm r : AVX512_maskable_custom<opc, MRMSrcReg,
|
||||
(outs _.RC:$dst), (ins GR32:$src),
|
||||
!con((ins _.RC:$src0, _.KRCWM:$mask), (ins GR32:$src)),
|
||||
!con((ins _.KRCWM:$mask), (ins GR32:$src)),
|
||||
"vpbroadcast"##_.Suffix, "$src", "$src", [], [], [],
|
||||
"$src0 = $dst">, T8PD, EVEX, Sched<[SchedRR]>;
|
||||
defm rr : AVX512_maskable_custom<opc, MRMSrcReg,
|
||||
(outs _.RC:$dst), (ins GR32:$src),
|
||||
!con((ins _.RC:$src0, _.KRCWM:$mask), (ins GR32:$src)),
|
||||
!con((ins _.KRCWM:$mask), (ins GR32:$src)),
|
||||
"vpbroadcast"##_.Suffix, "$src", "$src", [], [], [],
|
||||
"$src0 = $dst">, T8PD, EVEX, Sched<[SchedRR]>;
|
||||
|
||||
def : Pat <(_.VT (OpNode SrcRC:$src)),
|
||||
(!cast<Instruction>(Name#r)
|
||||
(!cast<Instruction>(Name#rr)
|
||||
(i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
|
||||
|
||||
def : Pat <(vselect _.KRCWM:$mask, (_.VT (OpNode SrcRC:$src)), _.RC:$src0),
|
||||
(!cast<Instruction>(Name#rk) _.RC:$src0, _.KRCWM:$mask,
|
||||
(!cast<Instruction>(Name#rrk) _.RC:$src0, _.KRCWM:$mask,
|
||||
(i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
|
||||
|
||||
def : Pat <(vselect _.KRCWM:$mask, (_.VT (OpNode SrcRC:$src)), _.ImmAllZerosV),
|
||||
(!cast<Instruction>(Name#rkz) _.KRCWM:$mask,
|
||||
(!cast<Instruction>(Name#rrkz) _.KRCWM:$mask,
|
||||
(i32 (INSERT_SUBREG (i32 (IMPLICIT_DEF)), SrcRC:$src, Subreg)))>;
|
||||
}
|
||||
|
||||
@ -1395,67 +1395,67 @@ multiclass avx512_subvec_broadcast_rm_dq<bits<8> opc, string OpcodeStr,
|
||||
let Predicates = [HasAVX512] in {
|
||||
// 32-bit targets will fail to load a i64 directly but can use ZEXT_LOAD.
|
||||
def : Pat<(v8i64 (X86VBroadcast (v2i64 (X86vzload64 addr:$src)))),
|
||||
(VPBROADCASTQZm addr:$src)>;
|
||||
(VPBROADCASTQZrm addr:$src)>;
|
||||
|
||||
// FIXME this is to handle aligned extloads from i8.
|
||||
def : Pat<(v16i32 (X86VBroadcast (loadi32 addr:$src))),
|
||||
(VPBROADCASTDZm addr:$src)>;
|
||||
(VPBROADCASTDZrm addr:$src)>;
|
||||
}
|
||||
|
||||
let Predicates = [HasVLX] in {
|
||||
// 32-bit targets will fail to load a i64 directly but can use ZEXT_LOAD.
|
||||
def : Pat<(v2i64 (X86VBroadcast (v2i64 (X86vzload64 addr:$src)))),
|
||||
(VPBROADCASTQZ128m addr:$src)>;
|
||||
(VPBROADCASTQZ128rm addr:$src)>;
|
||||
def : Pat<(v4i64 (X86VBroadcast (v2i64 (X86vzload64 addr:$src)))),
|
||||
(VPBROADCASTQZ256m addr:$src)>;
|
||||
(VPBROADCASTQZ256rm addr:$src)>;
|
||||
|
||||
// FIXME this is to handle aligned extloads from i8.
|
||||
def : Pat<(v4i32 (X86VBroadcast (loadi32 addr:$src))),
|
||||
(VPBROADCASTDZ128m addr:$src)>;
|
||||
(VPBROADCASTDZ128rm addr:$src)>;
|
||||
def : Pat<(v8i32 (X86VBroadcast (loadi32 addr:$src))),
|
||||
(VPBROADCASTDZ256m addr:$src)>;
|
||||
(VPBROADCASTDZ256rm addr:$src)>;
|
||||
}
|
||||
let Predicates = [HasVLX, HasBWI] in {
|
||||
// loadi16 is tricky to fold, because !isTypeDesirableForOp, justifiably.
|
||||
// This means we'll encounter truncated i32 loads; match that here.
|
||||
def : Pat<(v8i16 (X86VBroadcast (i16 (trunc (i32 (load addr:$src)))))),
|
||||
(VPBROADCASTWZ128m addr:$src)>;
|
||||
(VPBROADCASTWZ128rm addr:$src)>;
|
||||
def : Pat<(v16i16 (X86VBroadcast (i16 (trunc (i32 (load addr:$src)))))),
|
||||
(VPBROADCASTWZ256m addr:$src)>;
|
||||
(VPBROADCASTWZ256rm addr:$src)>;
|
||||
def : Pat<(v8i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (extloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZ128m addr:$src)>;
|
||||
(VPBROADCASTWZ128rm addr:$src)>;
|
||||
def : Pat<(v8i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (zextloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZ128m addr:$src)>;
|
||||
(VPBROADCASTWZ128rm addr:$src)>;
|
||||
def : Pat<(v16i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (extloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZ256m addr:$src)>;
|
||||
(VPBROADCASTWZ256rm addr:$src)>;
|
||||
def : Pat<(v16i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (zextloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZ256m addr:$src)>;
|
||||
(VPBROADCASTWZ256rm addr:$src)>;
|
||||
|
||||
// FIXME this is to handle aligned extloads from i8.
|
||||
def : Pat<(v8i16 (X86VBroadcast (loadi16 addr:$src))),
|
||||
(VPBROADCASTWZ128m addr:$src)>;
|
||||
(VPBROADCASTWZ128rm addr:$src)>;
|
||||
def : Pat<(v16i16 (X86VBroadcast (loadi16 addr:$src))),
|
||||
(VPBROADCASTWZ256m addr:$src)>;
|
||||
(VPBROADCASTWZ256rm addr:$src)>;
|
||||
}
|
||||
let Predicates = [HasBWI] in {
|
||||
// loadi16 is tricky to fold, because !isTypeDesirableForOp, justifiably.
|
||||
// This means we'll encounter truncated i32 loads; match that here.
|
||||
def : Pat<(v32i16 (X86VBroadcast (i16 (trunc (i32 (load addr:$src)))))),
|
||||
(VPBROADCASTWZm addr:$src)>;
|
||||
(VPBROADCASTWZrm addr:$src)>;
|
||||
def : Pat<(v32i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (extloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZm addr:$src)>;
|
||||
(VPBROADCASTWZrm addr:$src)>;
|
||||
def : Pat<(v32i16 (X86VBroadcast
|
||||
(i16 (trunc (i32 (zextloadi16 addr:$src)))))),
|
||||
(VPBROADCASTWZm addr:$src)>;
|
||||
(VPBROADCASTWZrm addr:$src)>;
|
||||
|
||||
// FIXME this is to handle aligned extloads from i8.
|
||||
def : Pat<(v32i16 (X86VBroadcast (loadi16 addr:$src))),
|
||||
(VPBROADCASTWZm addr:$src)>;
|
||||
(VPBROADCASTWZrm addr:$src)>;
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
@ -627,18 +627,18 @@ static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
|
||||
{ X86::UCOMISSrr_Int, X86::UCOMISSrm_Int, TB_NO_REVERSE },
|
||||
{ X86::VAESIMCrr, X86::VAESIMCrm, 0 },
|
||||
{ X86::VAESKEYGENASSIST128rr,X86::VAESKEYGENASSIST128rm,0 },
|
||||
{ X86::VBROADCASTF32X2Z256r, X86::VBROADCASTF32X2Z256m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zr, X86::VBROADCASTF32X2Zm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128r, X86::VBROADCASTI32X2Z128m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256r, X86::VBROADCASTI32X2Z256m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zr, X86::VBROADCASTI32X2Zm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Z256rr,X86::VBROADCASTF32X2Z256rm,TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zrr, X86::VBROADCASTF32X2Zrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128rr,X86::VBROADCASTI32X2Z128rm,TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256rr,X86::VBROADCASTI32X2Z256rm,TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zrr, X86::VBROADCASTI32X2Zrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDYrr, X86::VBROADCASTSDYrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256r, X86::VBROADCASTSDZ256m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZr, X86::VBROADCASTSDZm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256rr, X86::VBROADCASTSDZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZrr, X86::VBROADCASTSDZrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSYrr, X86::VBROADCASTSSYrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128r, X86::VBROADCASTSSZ128m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256r, X86::VBROADCASTSSZ256m, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZr, X86::VBROADCASTSSZm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128rr, X86::VBROADCASTSSZ128rm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256rr, X86::VBROADCASTSSZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZrr, X86::VBROADCASTSSZrm, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSrr, X86::VBROADCASTSSrm, TB_NO_REVERSE },
|
||||
{ X86::VCOMISDZrr, X86::VCOMISDZrm, 0 },
|
||||
{ X86::VCOMISDZrr_Int, X86::VCOMISDZrm_Int, TB_NO_REVERSE },
|
||||
@ -906,24 +906,24 @@ static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
|
||||
{ X86::VPABSWZrr, X86::VPABSWZrm, 0 },
|
||||
{ X86::VPABSWrr, X86::VPABSWrm, 0 },
|
||||
{ X86::VPBROADCASTBYrr, X86::VPBROADCASTBYrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ128r, X86::VPBROADCASTBZ128m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256r, X86::VPBROADCASTBZ256m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZr, X86::VPBROADCASTBZm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBrr, X86::VPBROADCASTBrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ128rr, X86::VPBROADCASTBZ128rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256rr, X86::VPBROADCASTBZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZrr, X86::VPBROADCASTBZrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBrr , X86::VPBROADCASTBrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDYrr, X86::VPBROADCASTDYrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128r, X86::VPBROADCASTDZ128m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256r, X86::VPBROADCASTDZ256m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZr, X86::VPBROADCASTDZm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128rr, X86::VPBROADCASTDZ128rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256rr, X86::VPBROADCASTDZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZrr, X86::VPBROADCASTDZrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDrr, X86::VPBROADCASTDrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQYrr, X86::VPBROADCASTQYrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128r, X86::VPBROADCASTQZ128m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256r, X86::VPBROADCASTQZ256m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZr, X86::VPBROADCASTQZm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128rr, X86::VPBROADCASTQZ128rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256rr, X86::VPBROADCASTQZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZrr, X86::VPBROADCASTQZrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQrr, X86::VPBROADCASTQrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWYrr, X86::VPBROADCASTWYrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128r, X86::VPBROADCASTWZ128m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256r, X86::VPBROADCASTWZ256m, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZr, X86::VPBROADCASTWZm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128rr, X86::VPBROADCASTWZ128rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256rr, X86::VPBROADCASTWZ256rm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZrr, X86::VPBROADCASTWZrm, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWrr, X86::VPBROADCASTWrm, TB_NO_REVERSE },
|
||||
{ X86::VPCMPESTRIrr, X86::VPCMPESTRIrm, 0 },
|
||||
{ X86::VPCMPESTRMrr, X86::VPCMPESTRMrm, 0 },
|
||||
@ -1609,16 +1609,16 @@ static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
|
||||
{ X86::VBLENDVPDrr, X86::VBLENDVPDrm, 0 },
|
||||
{ X86::VBLENDVPSYrr, X86::VBLENDVPSYrm, 0 },
|
||||
{ X86::VBLENDVPSrr, X86::VBLENDVPSrm, 0 },
|
||||
{ X86::VBROADCASTF32X2Z256rkz, X86::VBROADCASTF32X2Z256mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zrkz, X86::VBROADCASTF32X2Zmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128rkz, X86::VBROADCASTI32X2Z128mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256rkz, X86::VBROADCASTI32X2Z256mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zrkz, X86::VBROADCASTI32X2Zmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256rkz, X86::VBROADCASTSDZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZrkz, X86::VBROADCASTSDZmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128rkz, X86::VBROADCASTSSZ128mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256rkz, X86::VBROADCASTSSZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZrkz, X86::VBROADCASTSSZmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Z256rrkz, X86::VBROADCASTF32X2Z256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zrrkz, X86::VBROADCASTF32X2Zrmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128rrkz, X86::VBROADCASTI32X2Z128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256rrkz, X86::VBROADCASTI32X2Z256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zrrkz, X86::VBROADCASTI32X2Zrmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256rrkz, X86::VBROADCASTSDZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZrrkz, X86::VBROADCASTSDZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128rrkz, X86::VBROADCASTSSZ128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256rrkz, X86::VBROADCASTSSZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZrrkz, X86::VBROADCASTSSZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VCMPPDYrri, X86::VCMPPDYrmi, 0 },
|
||||
{ X86::VCMPPDZ128rri, X86::VCMPPDZ128rmi, 0 },
|
||||
{ X86::VCMPPDZ256rri, X86::VCMPPDZ256rmi, 0 },
|
||||
@ -2153,18 +2153,18 @@ static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
|
||||
{ X86::VPBLENDVBrr, X86::VPBLENDVBrm, 0 },
|
||||
{ X86::VPBLENDWYrri, X86::VPBLENDWYrmi, 0 },
|
||||
{ X86::VPBLENDWrri, X86::VPBLENDWrmi, 0 },
|
||||
{ X86::VPBROADCASTBZ128rkz, X86::VPBROADCASTBZ128mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256rkz, X86::VPBROADCASTBZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZrkz, X86::VPBROADCASTBZmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128rkz, X86::VPBROADCASTDZ128mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256rkz, X86::VPBROADCASTDZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZrkz, X86::VPBROADCASTDZmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128rkz, X86::VPBROADCASTQZ128mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256rkz, X86::VPBROADCASTQZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZrkz, X86::VPBROADCASTQZmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128rkz, X86::VPBROADCASTWZ128mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256rkz, X86::VPBROADCASTWZ256mkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZrkz, X86::VPBROADCASTWZmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ128rrkz, X86::VPBROADCASTBZ128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256rrkz, X86::VPBROADCASTBZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZrrkz, X86::VPBROADCASTBZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128rrkz, X86::VPBROADCASTDZ128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256rrkz, X86::VPBROADCASTDZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZrrkz, X86::VPBROADCASTDZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128rrkz, X86::VPBROADCASTQZ128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256rrkz, X86::VPBROADCASTQZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZrrkz, X86::VPBROADCASTQZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128rrkz, X86::VPBROADCASTWZ128rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256rrkz, X86::VPBROADCASTWZ256rmkz, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZrrkz, X86::VPBROADCASTWZrmkz, TB_NO_REVERSE },
|
||||
{ X86::VPCLMULQDQYrr, X86::VPCLMULQDQYrm, 0 },
|
||||
{ X86::VPCLMULQDQZ128rr, X86::VPCLMULQDQZ128rm, 0 },
|
||||
{ X86::VPCLMULQDQZ256rr, X86::VPCLMULQDQZ256rm, 0 },
|
||||
@ -3010,16 +3010,16 @@ static const X86MemoryFoldTableEntry MemoryFoldTable3[] = {
|
||||
{ X86::VBLENDMPSZ128rrk, X86::VBLENDMPSZ128rmk, 0 },
|
||||
{ X86::VBLENDMPSZ256rrk, X86::VBLENDMPSZ256rmk, 0 },
|
||||
{ X86::VBLENDMPSZrrk, X86::VBLENDMPSZrmk, 0 },
|
||||
{ X86::VBROADCASTF32X2Z256rk, X86::VBROADCASTF32X2Z256mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zrk, X86::VBROADCASTF32X2Zmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128rk, X86::VBROADCASTI32X2Z128mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256rk, X86::VBROADCASTI32X2Z256mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zrk, X86::VBROADCASTI32X2Zmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256rk, X86::VBROADCASTSDZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZrk, X86::VBROADCASTSDZmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128rk, X86::VBROADCASTSSZ128mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256rk, X86::VBROADCASTSSZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZrk, X86::VBROADCASTSSZmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Z256rrk, X86::VBROADCASTF32X2Z256rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTF32X2Zrrk, X86::VBROADCASTF32X2Zrmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z128rrk, X86::VBROADCASTI32X2Z128rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Z256rrk, X86::VBROADCASTI32X2Z256rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTI32X2Zrrk, X86::VBROADCASTI32X2Zrmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZ256rrk, X86::VBROADCASTSDZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSDZrrk, X86::VBROADCASTSDZrmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ128rrk, X86::VBROADCASTSSZ128rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZ256rrk, X86::VBROADCASTSSZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VBROADCASTSSZrrk, X86::VBROADCASTSSZrmk, TB_NO_REVERSE },
|
||||
{ X86::VCMPPDZ128rrik, X86::VCMPPDZ128rmik, 0 },
|
||||
{ X86::VCMPPDZ256rrik, X86::VCMPPDZ256rmik, 0 },
|
||||
{ X86::VCMPPDZrrik, X86::VCMPPDZrmik, 0 },
|
||||
@ -3662,18 +3662,18 @@ static const X86MemoryFoldTableEntry MemoryFoldTable3[] = {
|
||||
{ X86::VPBLENDMWZ128rrk, X86::VPBLENDMWZ128rmk, 0 },
|
||||
{ X86::VPBLENDMWZ256rrk, X86::VPBLENDMWZ256rmk, 0 },
|
||||
{ X86::VPBLENDMWZrrk, X86::VPBLENDMWZrmk, 0 },
|
||||
{ X86::VPBROADCASTBZ128rk, X86::VPBROADCASTBZ128mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256rk, X86::VPBROADCASTBZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZrk, X86::VPBROADCASTBZmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128rk, X86::VPBROADCASTDZ128mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256rk, X86::VPBROADCASTDZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZrk, X86::VPBROADCASTDZmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128rk, X86::VPBROADCASTQZ128mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256rk, X86::VPBROADCASTQZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZrk, X86::VPBROADCASTQZmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128rk, X86::VPBROADCASTWZ128mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256rk, X86::VPBROADCASTWZ256mk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZrk, X86::VPBROADCASTWZmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ128rrk, X86::VPBROADCASTBZ128rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZ256rrk, X86::VPBROADCASTBZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTBZrrk, X86::VPBROADCASTBZrmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ128rrk, X86::VPBROADCASTDZ128rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZ256rrk, X86::VPBROADCASTDZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTDZrrk, X86::VPBROADCASTDZrmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ128rrk, X86::VPBROADCASTQZ128rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZ256rrk, X86::VPBROADCASTQZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTQZrrk, X86::VPBROADCASTQZrmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ128rrk, X86::VPBROADCASTWZ128rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZ256rrk, X86::VPBROADCASTWZ256rmk, TB_NO_REVERSE },
|
||||
{ X86::VPBROADCASTWZrrk, X86::VPBROADCASTWZrmk, TB_NO_REVERSE },
|
||||
{ X86::VPCMOVYrrr, X86::VPCMOVYrrm, 0 },
|
||||
{ X86::VPCMOVrrr, X86::VPCMOVrrm, 0 },
|
||||
{ X86::VPCMPBZ128rrik, X86::VPCMPBZ128rmik, 0 },
|
||||
|
||||
@ -1182,61 +1182,61 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
|
||||
case X86::VMOVUPSZ128rmk: case X86::VMOVAPSZ128rmk:
|
||||
case X86::VMOVUPSZ256rmk: case X86::VMOVAPSZ256rmk:
|
||||
case X86::VMOVUPSZrmk: case X86::VMOVAPSZrmk:
|
||||
case X86::VBROADCASTSDZ256mk:
|
||||
case X86::VBROADCASTSDZmk:
|
||||
case X86::VBROADCASTSSZ128mk:
|
||||
case X86::VBROADCASTSSZ256mk:
|
||||
case X86::VBROADCASTSSZmk:
|
||||
case X86::VPBROADCASTDZ128mk:
|
||||
case X86::VPBROADCASTDZ256mk:
|
||||
case X86::VPBROADCASTDZmk:
|
||||
case X86::VPBROADCASTQZ128mk:
|
||||
case X86::VPBROADCASTQZ256mk:
|
||||
case X86::VPBROADCASTQZmk: {
|
||||
case X86::VBROADCASTSDZ256rmk:
|
||||
case X86::VBROADCASTSDZrmk:
|
||||
case X86::VBROADCASTSSZ128rmk:
|
||||
case X86::VBROADCASTSSZ256rmk:
|
||||
case X86::VBROADCASTSSZrmk:
|
||||
case X86::VPBROADCASTDZ128rmk:
|
||||
case X86::VPBROADCASTDZ256rmk:
|
||||
case X86::VPBROADCASTDZrmk:
|
||||
case X86::VPBROADCASTQZ128rmk:
|
||||
case X86::VPBROADCASTQZ256rmk:
|
||||
case X86::VPBROADCASTQZrmk: {
|
||||
unsigned Opc;
|
||||
switch (MIOpc) {
|
||||
default: llvm_unreachable("Unreachable!");
|
||||
case X86::VMOVDQU8Z128rmk: Opc = X86::VPBLENDMBZ128rmk; break;
|
||||
case X86::VMOVDQU8Z256rmk: Opc = X86::VPBLENDMBZ256rmk; break;
|
||||
case X86::VMOVDQU8Zrmk: Opc = X86::VPBLENDMBZrmk; break;
|
||||
case X86::VMOVDQU16Z128rmk: Opc = X86::VPBLENDMWZ128rmk; break;
|
||||
case X86::VMOVDQU16Z256rmk: Opc = X86::VPBLENDMWZ256rmk; break;
|
||||
case X86::VMOVDQU16Zrmk: Opc = X86::VPBLENDMWZrmk; break;
|
||||
case X86::VMOVDQU32Z128rmk: Opc = X86::VPBLENDMDZ128rmk; break;
|
||||
case X86::VMOVDQU32Z256rmk: Opc = X86::VPBLENDMDZ256rmk; break;
|
||||
case X86::VMOVDQU32Zrmk: Opc = X86::VPBLENDMDZrmk; break;
|
||||
case X86::VMOVDQU64Z128rmk: Opc = X86::VPBLENDMQZ128rmk; break;
|
||||
case X86::VMOVDQU64Z256rmk: Opc = X86::VPBLENDMQZ256rmk; break;
|
||||
case X86::VMOVDQU64Zrmk: Opc = X86::VPBLENDMQZrmk; break;
|
||||
case X86::VMOVUPDZ128rmk: Opc = X86::VBLENDMPDZ128rmk; break;
|
||||
case X86::VMOVUPDZ256rmk: Opc = X86::VBLENDMPDZ256rmk; break;
|
||||
case X86::VMOVUPDZrmk: Opc = X86::VBLENDMPDZrmk; break;
|
||||
case X86::VMOVUPSZ128rmk: Opc = X86::VBLENDMPSZ128rmk; break;
|
||||
case X86::VMOVUPSZ256rmk: Opc = X86::VBLENDMPSZ256rmk; break;
|
||||
case X86::VMOVUPSZrmk: Opc = X86::VBLENDMPSZrmk; break;
|
||||
case X86::VMOVDQA32Z128rmk: Opc = X86::VPBLENDMDZ128rmk; break;
|
||||
case X86::VMOVDQA32Z256rmk: Opc = X86::VPBLENDMDZ256rmk; break;
|
||||
case X86::VMOVDQA32Zrmk: Opc = X86::VPBLENDMDZrmk; break;
|
||||
case X86::VMOVDQA64Z128rmk: Opc = X86::VPBLENDMQZ128rmk; break;
|
||||
case X86::VMOVDQA64Z256rmk: Opc = X86::VPBLENDMQZ256rmk; break;
|
||||
case X86::VMOVDQA64Zrmk: Opc = X86::VPBLENDMQZrmk; break;
|
||||
case X86::VMOVAPDZ128rmk: Opc = X86::VBLENDMPDZ128rmk; break;
|
||||
case X86::VMOVAPDZ256rmk: Opc = X86::VBLENDMPDZ256rmk; break;
|
||||
case X86::VMOVAPDZrmk: Opc = X86::VBLENDMPDZrmk; break;
|
||||
case X86::VMOVAPSZ128rmk: Opc = X86::VBLENDMPSZ128rmk; break;
|
||||
case X86::VMOVAPSZ256rmk: Opc = X86::VBLENDMPSZ256rmk; break;
|
||||
case X86::VMOVAPSZrmk: Opc = X86::VBLENDMPSZrmk; break;
|
||||
case X86::VBROADCASTSDZ256mk: Opc = X86::VBLENDMPDZ256rmbk; break;
|
||||
case X86::VBROADCASTSDZmk: Opc = X86::VBLENDMPDZrmbk; break;
|
||||
case X86::VBROADCASTSSZ128mk: Opc = X86::VBLENDMPSZ128rmbk; break;
|
||||
case X86::VBROADCASTSSZ256mk: Opc = X86::VBLENDMPSZ256rmbk; break;
|
||||
case X86::VBROADCASTSSZmk: Opc = X86::VBLENDMPSZrmbk; break;
|
||||
case X86::VPBROADCASTDZ128mk: Opc = X86::VPBLENDMDZ128rmbk; break;
|
||||
case X86::VPBROADCASTDZ256mk: Opc = X86::VPBLENDMDZ256rmbk; break;
|
||||
case X86::VPBROADCASTDZmk: Opc = X86::VPBLENDMDZrmbk; break;
|
||||
case X86::VPBROADCASTQZ128mk: Opc = X86::VPBLENDMQZ128rmbk; break;
|
||||
case X86::VPBROADCASTQZ256mk: Opc = X86::VPBLENDMQZ256rmbk; break;
|
||||
case X86::VPBROADCASTQZmk: Opc = X86::VPBLENDMQZrmbk; break;
|
||||
case X86::VMOVDQU8Z128rmk: Opc = X86::VPBLENDMBZ128rmk; break;
|
||||
case X86::VMOVDQU8Z256rmk: Opc = X86::VPBLENDMBZ256rmk; break;
|
||||
case X86::VMOVDQU8Zrmk: Opc = X86::VPBLENDMBZrmk; break;
|
||||
case X86::VMOVDQU16Z128rmk: Opc = X86::VPBLENDMWZ128rmk; break;
|
||||
case X86::VMOVDQU16Z256rmk: Opc = X86::VPBLENDMWZ256rmk; break;
|
||||
case X86::VMOVDQU16Zrmk: Opc = X86::VPBLENDMWZrmk; break;
|
||||
case X86::VMOVDQU32Z128rmk: Opc = X86::VPBLENDMDZ128rmk; break;
|
||||
case X86::VMOVDQU32Z256rmk: Opc = X86::VPBLENDMDZ256rmk; break;
|
||||
case X86::VMOVDQU32Zrmk: Opc = X86::VPBLENDMDZrmk; break;
|
||||
case X86::VMOVDQU64Z128rmk: Opc = X86::VPBLENDMQZ128rmk; break;
|
||||
case X86::VMOVDQU64Z256rmk: Opc = X86::VPBLENDMQZ256rmk; break;
|
||||
case X86::VMOVDQU64Zrmk: Opc = X86::VPBLENDMQZrmk; break;
|
||||
case X86::VMOVUPDZ128rmk: Opc = X86::VBLENDMPDZ128rmk; break;
|
||||
case X86::VMOVUPDZ256rmk: Opc = X86::VBLENDMPDZ256rmk; break;
|
||||
case X86::VMOVUPDZrmk: Opc = X86::VBLENDMPDZrmk; break;
|
||||
case X86::VMOVUPSZ128rmk: Opc = X86::VBLENDMPSZ128rmk; break;
|
||||
case X86::VMOVUPSZ256rmk: Opc = X86::VBLENDMPSZ256rmk; break;
|
||||
case X86::VMOVUPSZrmk: Opc = X86::VBLENDMPSZrmk; break;
|
||||
case X86::VMOVDQA32Z128rmk: Opc = X86::VPBLENDMDZ128rmk; break;
|
||||
case X86::VMOVDQA32Z256rmk: Opc = X86::VPBLENDMDZ256rmk; break;
|
||||
case X86::VMOVDQA32Zrmk: Opc = X86::VPBLENDMDZrmk; break;
|
||||
case X86::VMOVDQA64Z128rmk: Opc = X86::VPBLENDMQZ128rmk; break;
|
||||
case X86::VMOVDQA64Z256rmk: Opc = X86::VPBLENDMQZ256rmk; break;
|
||||
case X86::VMOVDQA64Zrmk: Opc = X86::VPBLENDMQZrmk; break;
|
||||
case X86::VMOVAPDZ128rmk: Opc = X86::VBLENDMPDZ128rmk; break;
|
||||
case X86::VMOVAPDZ256rmk: Opc = X86::VBLENDMPDZ256rmk; break;
|
||||
case X86::VMOVAPDZrmk: Opc = X86::VBLENDMPDZrmk; break;
|
||||
case X86::VMOVAPSZ128rmk: Opc = X86::VBLENDMPSZ128rmk; break;
|
||||
case X86::VMOVAPSZ256rmk: Opc = X86::VBLENDMPSZ256rmk; break;
|
||||
case X86::VMOVAPSZrmk: Opc = X86::VBLENDMPSZrmk; break;
|
||||
case X86::VBROADCASTSDZ256rmk: Opc = X86::VBLENDMPDZ256rmbk; break;
|
||||
case X86::VBROADCASTSDZrmk: Opc = X86::VBLENDMPDZrmbk; break;
|
||||
case X86::VBROADCASTSSZ128rmk: Opc = X86::VBLENDMPSZ128rmbk; break;
|
||||
case X86::VBROADCASTSSZ256rmk: Opc = X86::VBLENDMPSZ256rmbk; break;
|
||||
case X86::VBROADCASTSSZrmk: Opc = X86::VBLENDMPSZrmbk; break;
|
||||
case X86::VPBROADCASTDZ128rmk: Opc = X86::VPBLENDMDZ128rmbk; break;
|
||||
case X86::VPBROADCASTDZ256rmk: Opc = X86::VPBLENDMDZ256rmbk; break;
|
||||
case X86::VPBROADCASTDZrmk: Opc = X86::VPBLENDMDZrmbk; break;
|
||||
case X86::VPBROADCASTQZ128rmk: Opc = X86::VPBLENDMQZ128rmbk; break;
|
||||
case X86::VPBROADCASTQZ256rmk: Opc = X86::VPBLENDMQZ256rmbk; break;
|
||||
case X86::VPBROADCASTQZrmk: Opc = X86::VPBLENDMQZrmbk; break;
|
||||
}
|
||||
|
||||
NewMI = BuildMI(MF, MI.getDebugLoc(), get(Opc))
|
||||
@ -5414,33 +5414,33 @@ static unsigned getBroadcastOpcode(const X86MemoryFoldTableEntry *I,
|
||||
case TB_BCAST_D:
|
||||
switch (SpillSize) {
|
||||
default: llvm_unreachable("Unknown spill size");
|
||||
case 16: return X86::VPBROADCASTDZ128m;
|
||||
case 32: return X86::VPBROADCASTDZ256m;
|
||||
case 64: return X86::VPBROADCASTDZm;
|
||||
case 16: return X86::VPBROADCASTDZ128rm;
|
||||
case 32: return X86::VPBROADCASTDZ256rm;
|
||||
case 64: return X86::VPBROADCASTDZrm;
|
||||
}
|
||||
break;
|
||||
case TB_BCAST_Q:
|
||||
switch (SpillSize) {
|
||||
default: llvm_unreachable("Unknown spill size");
|
||||
case 16: return X86::VPBROADCASTQZ128m;
|
||||
case 32: return X86::VPBROADCASTQZ256m;
|
||||
case 64: return X86::VPBROADCASTQZm;
|
||||
case 16: return X86::VPBROADCASTQZ128rm;
|
||||
case 32: return X86::VPBROADCASTQZ256rm;
|
||||
case 64: return X86::VPBROADCASTQZrm;
|
||||
}
|
||||
break;
|
||||
case TB_BCAST_SS:
|
||||
switch (SpillSize) {
|
||||
default: llvm_unreachable("Unknown spill size");
|
||||
case 16: return X86::VBROADCASTSSZ128m;
|
||||
case 32: return X86::VBROADCASTSSZ256m;
|
||||
case 64: return X86::VBROADCASTSSZm;
|
||||
case 16: return X86::VBROADCASTSSZ128rm;
|
||||
case 32: return X86::VBROADCASTSSZ256rm;
|
||||
case 64: return X86::VBROADCASTSSZrm;
|
||||
}
|
||||
break;
|
||||
case TB_BCAST_SD:
|
||||
switch (SpillSize) {
|
||||
default: llvm_unreachable("Unknown spill size");
|
||||
case 16: return X86::VMOVDDUPZ128rm;
|
||||
case 32: return X86::VBROADCASTSDZ256m;
|
||||
case 64: return X86::VBROADCASTSDZm;
|
||||
case 32: return X86::VBROADCASTSDZ256rm;
|
||||
case 64: return X86::VBROADCASTSDZrm;
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -6120,18 +6120,18 @@ static const uint16_t ReplaceableInstrs[][3] = {
|
||||
{ X86::VMOVSDZrm_alt, X86::VMOVSDZrm_alt, X86::VMOVQI2PQIZrm },
|
||||
{ X86::VMOVSSZrm, X86::VMOVSSZrm, X86::VMOVDI2PDIZrm },
|
||||
{ X86::VMOVSSZrm_alt, X86::VMOVSSZrm_alt, X86::VMOVDI2PDIZrm },
|
||||
{ X86::VBROADCASTSSZ128r, X86::VBROADCASTSSZ128r, X86::VPBROADCASTDZ128r },
|
||||
{ X86::VBROADCASTSSZ128m, X86::VBROADCASTSSZ128m, X86::VPBROADCASTDZ128m },
|
||||
{ X86::VBROADCASTSSZ256r, X86::VBROADCASTSSZ256r, X86::VPBROADCASTDZ256r },
|
||||
{ X86::VBROADCASTSSZ256m, X86::VBROADCASTSSZ256m, X86::VPBROADCASTDZ256m },
|
||||
{ X86::VBROADCASTSSZr, X86::VBROADCASTSSZr, X86::VPBROADCASTDZr },
|
||||
{ X86::VBROADCASTSSZm, X86::VBROADCASTSSZm, X86::VPBROADCASTDZm },
|
||||
{ X86::VMOVDDUPZ128rr, X86::VMOVDDUPZ128rr, X86::VPBROADCASTQZ128r },
|
||||
{ X86::VMOVDDUPZ128rm, X86::VMOVDDUPZ128rm, X86::VPBROADCASTQZ128m },
|
||||
{ X86::VBROADCASTSDZ256r, X86::VBROADCASTSDZ256r, X86::VPBROADCASTQZ256r },
|
||||
{ X86::VBROADCASTSDZ256m, X86::VBROADCASTSDZ256m, X86::VPBROADCASTQZ256m },
|
||||
{ X86::VBROADCASTSDZr, X86::VBROADCASTSDZr, X86::VPBROADCASTQZr },
|
||||
{ X86::VBROADCASTSDZm, X86::VBROADCASTSDZm, X86::VPBROADCASTQZm },
|
||||
{ X86::VBROADCASTSSZ128rr,X86::VBROADCASTSSZ128rr,X86::VPBROADCASTDZ128rr },
|
||||
{ X86::VBROADCASTSSZ128rm,X86::VBROADCASTSSZ128rm,X86::VPBROADCASTDZ128rm },
|
||||
{ X86::VBROADCASTSSZ256rr,X86::VBROADCASTSSZ256rr,X86::VPBROADCASTDZ256rr },
|
||||
{ X86::VBROADCASTSSZ256rm,X86::VBROADCASTSSZ256rm,X86::VPBROADCASTDZ256rm },
|
||||
{ X86::VBROADCASTSSZrr, X86::VBROADCASTSSZrr, X86::VPBROADCASTDZrr },
|
||||
{ X86::VBROADCASTSSZrm, X86::VBROADCASTSSZrm, X86::VPBROADCASTDZrm },
|
||||
{ X86::VMOVDDUPZ128rr, X86::VMOVDDUPZ128rr, X86::VPBROADCASTQZ128rr },
|
||||
{ X86::VMOVDDUPZ128rm, X86::VMOVDDUPZ128rm, X86::VPBROADCASTQZ128rm },
|
||||
{ X86::VBROADCASTSDZ256rr,X86::VBROADCASTSDZ256rr,X86::VPBROADCASTQZ256rr },
|
||||
{ X86::VBROADCASTSDZ256rm,X86::VBROADCASTSDZ256rm,X86::VPBROADCASTQZ256rm },
|
||||
{ X86::VBROADCASTSDZrr, X86::VBROADCASTSDZrr, X86::VPBROADCASTQZrr },
|
||||
{ X86::VBROADCASTSDZrm, X86::VBROADCASTSDZrm, X86::VPBROADCASTQZrm },
|
||||
{ X86::VINSERTF32x4Zrr, X86::VINSERTF32x4Zrr, X86::VINSERTI32x4Zrr },
|
||||
{ X86::VINSERTF32x4Zrm, X86::VINSERTF32x4Zrm, X86::VINSERTI32x4Zrm },
|
||||
{ X86::VINSERTF32x8Zrr, X86::VINSERTF32x8Zrr, X86::VINSERTI32x8Zrr },
|
||||
|
||||
@ -2559,32 +2559,32 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
||||
case X86::VMOVDDUPZ128rm:
|
||||
case X86::VBROADCASTSSrm:
|
||||
case X86::VBROADCASTSSYrm:
|
||||
case X86::VBROADCASTSSZ128m:
|
||||
case X86::VBROADCASTSSZ256m:
|
||||
case X86::VBROADCASTSSZm:
|
||||
case X86::VBROADCASTSSZ128rm:
|
||||
case X86::VBROADCASTSSZ256rm:
|
||||
case X86::VBROADCASTSSZrm:
|
||||
case X86::VBROADCASTSDYrm:
|
||||
case X86::VBROADCASTSDZ256m:
|
||||
case X86::VBROADCASTSDZm:
|
||||
case X86::VBROADCASTSDZ256rm:
|
||||
case X86::VBROADCASTSDZrm:
|
||||
case X86::VPBROADCASTBrm:
|
||||
case X86::VPBROADCASTBYrm:
|
||||
case X86::VPBROADCASTBZ128m:
|
||||
case X86::VPBROADCASTBZ256m:
|
||||
case X86::VPBROADCASTBZm:
|
||||
case X86::VPBROADCASTBZ128rm:
|
||||
case X86::VPBROADCASTBZ256rm:
|
||||
case X86::VPBROADCASTBZrm:
|
||||
case X86::VPBROADCASTDrm:
|
||||
case X86::VPBROADCASTDYrm:
|
||||
case X86::VPBROADCASTDZ128m:
|
||||
case X86::VPBROADCASTDZ256m:
|
||||
case X86::VPBROADCASTDZm:
|
||||
case X86::VPBROADCASTDZ128rm:
|
||||
case X86::VPBROADCASTDZ256rm:
|
||||
case X86::VPBROADCASTDZrm:
|
||||
case X86::VPBROADCASTQrm:
|
||||
case X86::VPBROADCASTQYrm:
|
||||
case X86::VPBROADCASTQZ128m:
|
||||
case X86::VPBROADCASTQZ256m:
|
||||
case X86::VPBROADCASTQZm:
|
||||
case X86::VPBROADCASTQZ128rm:
|
||||
case X86::VPBROADCASTQZ256rm:
|
||||
case X86::VPBROADCASTQZrm:
|
||||
case X86::VPBROADCASTWrm:
|
||||
case X86::VPBROADCASTWYrm:
|
||||
case X86::VPBROADCASTWZ128m:
|
||||
case X86::VPBROADCASTWZ256m:
|
||||
case X86::VPBROADCASTWZm:
|
||||
case X86::VPBROADCASTWZ128rm:
|
||||
case X86::VPBROADCASTWZ256rm:
|
||||
case X86::VPBROADCASTWZrm:
|
||||
if (!OutStreamer->isVerboseAsm())
|
||||
break;
|
||||
if (MI->getNumOperands() <= 4)
|
||||
@ -2593,37 +2593,37 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
||||
int NumElts;
|
||||
switch (MI->getOpcode()) {
|
||||
default: llvm_unreachable("Invalid opcode");
|
||||
case X86::MOVDDUPrm: NumElts = 2; break;
|
||||
case X86::VMOVDDUPrm: NumElts = 2; break;
|
||||
case X86::VMOVDDUPZ128rm: NumElts = 2; break;
|
||||
case X86::VBROADCASTSSrm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSSYrm: NumElts = 8; break;
|
||||
case X86::VBROADCASTSSZ128m: NumElts = 4; break;
|
||||
case X86::VBROADCASTSSZ256m: NumElts = 8; break;
|
||||
case X86::VBROADCASTSSZm: NumElts = 16; break;
|
||||
case X86::VBROADCASTSDYrm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSDZ256m: NumElts = 4; break;
|
||||
case X86::VBROADCASTSDZm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTBrm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTBYrm: NumElts = 32; break;
|
||||
case X86::VPBROADCASTBZ128m: NumElts = 16; break;
|
||||
case X86::VPBROADCASTBZ256m: NumElts = 32; break;
|
||||
case X86::VPBROADCASTBZm: NumElts = 64; break;
|
||||
case X86::VPBROADCASTDrm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTDYrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTDZ128m: NumElts = 4; break;
|
||||
case X86::VPBROADCASTDZ256m: NumElts = 8; break;
|
||||
case X86::VPBROADCASTDZm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTQrm: NumElts = 2; break;
|
||||
case X86::VPBROADCASTQYrm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTQZ128m: NumElts = 2; break;
|
||||
case X86::VPBROADCASTQZ256m: NumElts = 4; break;
|
||||
case X86::VPBROADCASTQZm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWYrm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTWZ128m: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWZ256m: NumElts = 16; break;
|
||||
case X86::VPBROADCASTWZm: NumElts = 32; break;
|
||||
case X86::MOVDDUPrm: NumElts = 2; break;
|
||||
case X86::VMOVDDUPrm: NumElts = 2; break;
|
||||
case X86::VMOVDDUPZ128rm: NumElts = 2; break;
|
||||
case X86::VBROADCASTSSrm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSSYrm: NumElts = 8; break;
|
||||
case X86::VBROADCASTSSZ128rm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSSZ256rm: NumElts = 8; break;
|
||||
case X86::VBROADCASTSSZrm: NumElts = 16; break;
|
||||
case X86::VBROADCASTSDYrm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSDZ256rm: NumElts = 4; break;
|
||||
case X86::VBROADCASTSDZrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTBrm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTBYrm: NumElts = 32; break;
|
||||
case X86::VPBROADCASTBZ128rm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTBZ256rm: NumElts = 32; break;
|
||||
case X86::VPBROADCASTBZrm: NumElts = 64; break;
|
||||
case X86::VPBROADCASTDrm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTDYrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTDZ128rm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTDZ256rm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTDZrm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTQrm: NumElts = 2; break;
|
||||
case X86::VPBROADCASTQYrm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTQZ128rm: NumElts = 2; break;
|
||||
case X86::VPBROADCASTQZ256rm: NumElts = 4; break;
|
||||
case X86::VPBROADCASTQZrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWrm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWYrm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTWZ128rm: NumElts = 8; break;
|
||||
case X86::VPBROADCASTWZ256rm: NumElts = 16; break;
|
||||
case X86::VPBROADCASTWZrm: NumElts = 32; break;
|
||||
}
|
||||
|
||||
std::string Comment;
|
||||
|
||||
@ -1334,8 +1334,8 @@ def: InstRW<[SKXWriteResGroup95], (instrs VMOVNTDQAZ128rm,
|
||||
def: InstRW<[SKXWriteResGroup95, ReadAfterVecXLd],
|
||||
(instregex "VBLENDMPDZ128rm(b?)",
|
||||
"VBLENDMPSZ128rm(b?)",
|
||||
"VBROADCASTI32X2Z128m(b?)",
|
||||
"VBROADCASTSSZ128m(b?)",
|
||||
"VBROADCASTI32X2Z128rm(b?)",
|
||||
"VBROADCASTSSZ128rm(b?)",
|
||||
"VINSERT(F|I)128rm",
|
||||
"VMOVAPDZ128rm(b?)",
|
||||
"VMOVAPSZ128rm(b?)",
|
||||
@ -1353,8 +1353,8 @@ def: InstRW<[SKXWriteResGroup95, ReadAfterVecXLd],
|
||||
"VPADD(B|D|Q|W)Z128rm(b?)",
|
||||
"(V?)PADD(B|D|Q|W)rm",
|
||||
"VPBLENDM(B|D|Q|W)Z128rm(b?)",
|
||||
"VPBROADCASTDZ128m(b?)",
|
||||
"VPBROADCASTQZ128m(b?)",
|
||||
"VPBROADCASTDZ128rm(b?)",
|
||||
"VPBROADCASTQZ128rm(b?)",
|
||||
"VPSUB(B|D|Q|W)Z128rm(b?)",
|
||||
"(V?)PSUB(B|D|Q|W)rm",
|
||||
"VPTERNLOGDZ128rm(b?)i",
|
||||
@ -1520,8 +1520,8 @@ def SKXWriteResGroup119 : SchedWriteRes<[SKXPort5,SKXPort23]> {
|
||||
}
|
||||
def: InstRW<[SKXWriteResGroup119], (instregex "FCOM(P?)(32|64)m",
|
||||
"VFPCLASSSDZrm(b?)",
|
||||
"VPBROADCASTB(Z|Z256)m(b?)",
|
||||
"VPBROADCASTW(Z|Z256)m(b?)")>;
|
||||
"VPBROADCASTB(Z|Z256)rm(b?)",
|
||||
"VPBROADCASTW(Z|Z256)rm(b?)")>;
|
||||
def: InstRW<[SKXWriteResGroup119], (instrs VPBROADCASTBYrm,
|
||||
VPBROADCASTWYrm,
|
||||
VPMOVSXBDYrm,
|
||||
@ -1538,24 +1538,24 @@ def: InstRW<[SKXWriteResGroup121], (instrs VMOVNTDQAZ256rm,
|
||||
def: InstRW<[SKXWriteResGroup121, ReadAfterVecYLd],
|
||||
(instregex "VBLENDMPD(Z|Z256)rm(b?)",
|
||||
"VBLENDMPS(Z|Z256)rm(b?)",
|
||||
"VBROADCASTF32X2Z256m(b?)",
|
||||
"VBROADCASTF32X2Zm(b?)",
|
||||
"VBROADCASTF32X2Z256rm(b?)",
|
||||
"VBROADCASTF32X2Zrm(b?)",
|
||||
"VBROADCASTF32X4Z256rm(b?)",
|
||||
"VBROADCASTF32X4rm(b?)",
|
||||
"VBROADCASTF32X8rm(b?)",
|
||||
"VBROADCASTF64X2Z128rm(b?)",
|
||||
"VBROADCASTF64X2rm(b?)",
|
||||
"VBROADCASTF64X4rm(b?)",
|
||||
"VBROADCASTI32X2Z256m(b?)",
|
||||
"VBROADCASTI32X2Zm(b?)",
|
||||
"VBROADCASTI32X2Z256rm(b?)",
|
||||
"VBROADCASTI32X2Zrm(b?)",
|
||||
"VBROADCASTI32X4Z256rm(b?)",
|
||||
"VBROADCASTI32X4rm(b?)",
|
||||
"VBROADCASTI32X8rm(b?)",
|
||||
"VBROADCASTI64X2Z128rm(b?)",
|
||||
"VBROADCASTI64X2rm(b?)",
|
||||
"VBROADCASTI64X4rm(b?)",
|
||||
"VBROADCASTSD(Z|Z256)m(b?)",
|
||||
"VBROADCASTSS(Z|Z256)m(b?)",
|
||||
"VBROADCASTSD(Z|Z256)rm(b?)",
|
||||
"VBROADCASTSS(Z|Z256)rm(b?)",
|
||||
"VINSERTF32x4(Z|Z256)rm(b?)",
|
||||
"VINSERTF32x8Zrm(b?)",
|
||||
"VINSERTF64x2(Z|Z256)rm(b?)",
|
||||
@ -1580,8 +1580,8 @@ def: InstRW<[SKXWriteResGroup121, ReadAfterVecYLd],
|
||||
"VPADD(B|D|Q|W)Yrm",
|
||||
"VPADD(B|D|Q|W)(Z|Z256)rm(b?)",
|
||||
"VPBLENDM(B|D|Q|W)(Z|Z256)rm(b?)",
|
||||
"VPBROADCASTD(Z|Z256)m(b?)",
|
||||
"VPBROADCASTQ(Z|Z256)m(b?)",
|
||||
"VPBROADCASTD(Z|Z256)rm(b?)",
|
||||
"VPBROADCASTQ(Z|Z256)rm(b?)",
|
||||
"VPSUB(B|D|Q|W)Yrm",
|
||||
"VPSUB(B|D|Q|W)(Z|Z256)rm(b?)",
|
||||
"VPTERNLOGD(Z|Z256)rm(b?)i",
|
||||
|
||||
@ -2085,9 +2085,9 @@ void X86SpeculativeLoadHardeningPass::hardenLoadAddr(
|
||||
|
||||
// Broadcast our state into a vector register.
|
||||
Register VStateReg = MRI->createVirtualRegister(OpRC);
|
||||
unsigned BroadcastOp =
|
||||
Is128Bit ? X86::VPBROADCASTQrZ128r
|
||||
: Is256Bit ? X86::VPBROADCASTQrZ256r : X86::VPBROADCASTQrZr;
|
||||
unsigned BroadcastOp = Is128Bit ? X86::VPBROADCASTQrZ128rr
|
||||
: Is256Bit ? X86::VPBROADCASTQrZ256rr
|
||||
: X86::VPBROADCASTQrZrr;
|
||||
auto BroadcastI =
|
||||
BuildMI(MBB, InsertPt, Loc, TII->get(BroadcastOp), VStateReg)
|
||||
.addReg(StateReg);
|
||||
|
||||
@ -698,39 +698,39 @@ body: |
|
||||
; CHECK: $ymm0 = VBROADCASTF128 $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTF32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VBROADCASTSDYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTF32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTF32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VBROADCASTSDYrr $xmm0
|
||||
$ymm0 = VBROADCASTF32X2Z256r $xmm0
|
||||
$ymm0 = VBROADCASTF32X2Z256rr $xmm0
|
||||
; CHECK: $ymm0 = VBROADCASTSDYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTSDZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTSDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VBROADCASTSDYrr $xmm0
|
||||
$ymm0 = VBROADCASTSDZ256r $xmm0
|
||||
$ymm0 = VBROADCASTSDZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VBROADCASTSSYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTSSZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTSSZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VBROADCASTSSYrr $xmm0
|
||||
$ymm0 = VBROADCASTSSZ256r $xmm0
|
||||
$ymm0 = VBROADCASTSSZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VPBROADCASTBYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTBZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTBYrr $xmm0
|
||||
$ymm0 = VPBROADCASTBZ256r $xmm0
|
||||
$ymm0 = VPBROADCASTBZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VPBROADCASTDYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTDZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTDYrr $xmm0
|
||||
$ymm0 = VPBROADCASTDZ256r $xmm0
|
||||
$ymm0 = VPBROADCASTDZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VPBROADCASTWYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTWZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTWZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTWYrr $xmm0
|
||||
$ymm0 = VPBROADCASTWZ256r $xmm0
|
||||
$ymm0 = VPBROADCASTWZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VBROADCASTI128 $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTI32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTQYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTI32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VBROADCASTI32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTQYrr $xmm0
|
||||
$ymm0 = VBROADCASTI32X2Z256r $xmm0
|
||||
$ymm0 = VBROADCASTI32X2Z256rr $xmm0
|
||||
; CHECK: $ymm0 = VPBROADCASTQYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTQZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPBROADCASTQZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPBROADCASTQYrr $xmm0
|
||||
$ymm0 = VPBROADCASTQZ256r $xmm0
|
||||
$ymm0 = VPBROADCASTQZ256rr $xmm0
|
||||
; CHECK: $ymm0 = VPABSBYrm $rip, 1, $rax, 0, $noreg
|
||||
$ymm0 = VPABSBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm0 = VPABSBYrr $ymm0
|
||||
@ -1740,29 +1740,29 @@ body: |
|
||||
; CHECK: $xmm0 = VPSADBWrr $xmm0, $xmm1
|
||||
$xmm0 = VPSADBWZ128rr $xmm0, $xmm1
|
||||
; CHECK: $xmm0 = VBROADCASTSSrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VBROADCASTSSZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VBROADCASTSSZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VBROADCASTSSrr $xmm0
|
||||
$xmm0 = VBROADCASTSSZ128r $xmm0
|
||||
$xmm0 = VBROADCASTSSZ128rr $xmm0
|
||||
; CHECK: $xmm0 = VPBROADCASTBrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTBZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTBZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VPBROADCASTBrr $xmm0
|
||||
$xmm0 = VPBROADCASTBZ128r $xmm0
|
||||
$xmm0 = VPBROADCASTBZ128rr $xmm0
|
||||
; CHECK: $xmm0 = VPBROADCASTDrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTDZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTDZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VPBROADCASTDrr $xmm0
|
||||
$xmm0 = VPBROADCASTDZ128r $xmm0
|
||||
$xmm0 = VPBROADCASTDZ128rr $xmm0
|
||||
; CHECK: $xmm0 = VPBROADCASTQrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTQZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTQZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VPBROADCASTQrr $xmm0
|
||||
$xmm0 = VPBROADCASTQZ128r $xmm0
|
||||
$xmm0 = VPBROADCASTQZ128rr $xmm0
|
||||
; CHECK: $xmm0 = VPBROADCASTWrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTWZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VPBROADCASTWZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VPBROADCASTWrr $xmm0
|
||||
$xmm0 = VPBROADCASTWZ128r $xmm0
|
||||
$xmm0 = VPBROADCASTWZ128rr $xmm0
|
||||
; CHECK: $xmm0 = VPBROADCASTQrm $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VBROADCASTI32X2Z128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm0 = VBROADCASTI32X2Z128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm0 = VPBROADCASTQrr $xmm0
|
||||
$xmm0 = VBROADCASTI32X2Z128r $xmm0
|
||||
$xmm0 = VBROADCASTI32X2Z128rr $xmm0
|
||||
; CHECK: $xmm0 = VCVTPS2PHrr $xmm0, 2, implicit $mxcsr
|
||||
$xmm0 = VCVTPS2PHZ128rr $xmm0, 2, implicit $mxcsr
|
||||
; CHECK: VCVTPS2PHmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 2, implicit $mxcsr
|
||||
@ -3058,42 +3058,42 @@ body: |
|
||||
$ymm16 = VPMOVZXWQZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPMOVZXWQZ256rr $xmm0
|
||||
$ymm16 = VPMOVZXWQZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTF32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTF32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTF32X2Z256r $xmm16
|
||||
$ymm16 = VBROADCASTF32X2Z256r $xmm16
|
||||
; CHECK: $ymm16 = VBROADCASTF32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTF32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTF32X2Z256rr $xmm16
|
||||
$ymm16 = VBROADCASTF32X2Z256rr $xmm16
|
||||
; CHECK: $ymm16 = VBROADCASTF32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTF32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTSDZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTSDZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTSDZ256r $xmm0
|
||||
$ymm16 = VBROADCASTSDZ256r $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTSSZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTSSZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTSSZ256r $xmm0
|
||||
$ymm16 = VBROADCASTSSZ256r $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTBZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTBZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTBZ256r $xmm0
|
||||
$ymm16 = VPBROADCASTBZ256r $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTDZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTDZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTDZ256r $xmm0
|
||||
$ymm16 = VPBROADCASTDZ256r $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTWZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTWZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTWZ256r $xmm0
|
||||
$ymm16 = VPBROADCASTWZ256r $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTSDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTSDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTSDZ256rr $xmm0
|
||||
$ymm16 = VBROADCASTSDZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTSSZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTSSZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTSSZ256rr $xmm0
|
||||
$ymm16 = VBROADCASTSSZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTBZ256rr $xmm0
|
||||
$ymm16 = VPBROADCASTBZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTDZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTDZ256rr $xmm0
|
||||
$ymm16 = VPBROADCASTDZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VPBROADCASTWZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTWZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTWZ256rr $xmm0
|
||||
$ymm16 = VPBROADCASTWZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTI32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTI32X4Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTI32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTI32X2Z256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTI32X2Z256r $xmm16
|
||||
$ymm16 = VBROADCASTI32X2Z256r $xmm16
|
||||
; CHECK: $ymm16 = VPBROADCASTQZ256m $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTQZ256m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTQZ256r $xmm0
|
||||
$ymm16 = VPBROADCASTQZ256r $xmm0
|
||||
; CHECK: $ymm16 = VBROADCASTI32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VBROADCASTI32X2Z256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VBROADCASTI32X2Z256rr $xmm16
|
||||
$ymm16 = VBROADCASTI32X2Z256rr $xmm16
|
||||
; CHECK: $ymm16 = VPBROADCASTQZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPBROADCASTQZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPBROADCASTQZ256rr $xmm0
|
||||
$ymm16 = VPBROADCASTQZ256rr $xmm0
|
||||
; CHECK: $ymm16 = VPABSBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
$ymm16 = VPABSBZ256rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $ymm16 = VPABSBZ256rr $ymm16
|
||||
@ -4110,30 +4110,30 @@ body: |
|
||||
$xmm16 = VPSADBWZ128rm $xmm16, $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPSADBWZ128rr $xmm16, $xmm1
|
||||
$xmm16 = VPSADBWZ128rr $xmm16, $xmm1
|
||||
; CHECK: $xmm16 = VBROADCASTSSZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VBROADCASTSSZ128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VBROADCASTSSZ128r $xmm16
|
||||
$xmm16 = VBROADCASTSSZ128r $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTBZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTBZ128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTBZ128r $xmm16
|
||||
$xmm16 = VPBROADCASTBZ128r $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTDZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTDZ128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTDZ128r $xmm16
|
||||
$xmm16 = VPBROADCASTDZ128r $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTQZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTQZ128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTQZ128r $xmm16
|
||||
$xmm16 = VPBROADCASTQZ128r $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTWZ128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTWZ128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTWZ128r $xmm16
|
||||
$xmm16 = VPBROADCASTWZ128r $xmm16
|
||||
; CHECK: $xmm16 = VBROADCASTI32X2Z128m $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VBROADCASTI32X2Z128m $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VBROADCASTI32X2Z128r $xmm0
|
||||
$xmm16 = VBROADCASTI32X2Z128r $xmm0
|
||||
; CHECK: $xmm16 = VBROADCASTSSZ128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VBROADCASTSSZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VBROADCASTSSZ128rr $xmm16
|
||||
$xmm16 = VBROADCASTSSZ128rr $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTBZ128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTBZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTBZ128rr $xmm16
|
||||
$xmm16 = VPBROADCASTBZ128rr $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTDZ128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTDZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTDZ128rr $xmm16
|
||||
$xmm16 = VPBROADCASTDZ128rr $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTQZ128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTQZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTQZ128rr $xmm16
|
||||
$xmm16 = VPBROADCASTQZ128rr $xmm16
|
||||
; CHECK: $xmm16 = VPBROADCASTWZ128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VPBROADCASTWZ128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VPBROADCASTWZ128rr $xmm16
|
||||
$xmm16 = VPBROADCASTWZ128rr $xmm16
|
||||
; CHECK: $xmm16 = VBROADCASTI32X2Z128rm $rip, 1, $rax, 0, $noreg
|
||||
$xmm16 = VBROADCASTI32X2Z128rm $rip, 1, $rax, 0, $noreg
|
||||
; CHECK: $xmm16 = VBROADCASTI32X2Z128rr $xmm0
|
||||
$xmm16 = VBROADCASTI32X2Z128rr $xmm0
|
||||
; CHECK: $xmm16 = VCVTPS2PHZ128rr $xmm16, 2, implicit $mxcsr
|
||||
$xmm16 = VCVTPS2PHZ128rr $xmm16, 2, implicit $mxcsr
|
||||
; CHECK: VCVTPS2PHZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16, 2, implicit $mxcsr
|
||||
|
||||
Loading…
Reference in New Issue
Block a user