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Should be using Bcc (average) latency to determine if-conversion threshold, not BL.
llvm-svn: 73759
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@ -296,7 +296,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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// Use branch latency information to determine if-conversion limits.
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const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
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const InstrItineraryData &InstrItins = Subtarget->getInstrItineraryData();
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unsigned Latency = InstrItins.getLatency(TII->get(ARM::BL).getSchedClass());
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unsigned Latency= InstrItins.getLatency(TII->get(ARM::Bcc).getSchedClass());
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if (Latency > 1) {
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setIfCvtBlockSizeLimit(Latency-1);
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if (Latency > 2)
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