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[MC] Add MCInstrAnalysis::evaluateMemoryOperandAddress

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Summary:
Add a new method which tries to compute the target address referenced by an operand.

This patch supports x86_64 RIP-relative addressing for now.

It is necessary to print referenced symbol names in llvm-objdump.

Reviewers: andreadb, MaskRay, grosbach, jgalenson, craig.topper

Reviewed By: MaskRay, craig.topper

Subscribers: bcain, rupprecht, jhenderson, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63847

llvm-svn: 366987
This commit is contained in:
Seiya Nuta 2019-07-25 06:57:09 +00:00
parent 826c75b015
commit 8f90edde69
3 changed files with 40 additions and 1 deletions
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6
include/llvm/MC/MCInstrAnalysis.h
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@ -152,6 +152,12 @@ public:
evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
uint64_t &Target) const; uint64_t &Target) const;
/// Given an instruction tries to get the address of a memory operand. Returns
/// the address on success.
virtual Optional<uint64_t> evaluateMemoryOperandAddress(const MCInst &Inst,
uint64_t Addr,
uint64_t Size) const;
/// Returns (PLT virtual address, GOT virtual address) pairs for PLT entries. /// Returns (PLT virtual address, GOT virtual address) pairs for PLT entries.
virtual std::vector<std::pair<uint64_t, uint64_t>> virtual std::vector<std::pair<uint64_t, uint64_t>>
findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents, findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents,

6
lib/MC/MCInstrAnalysis.cpp
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@ -33,3 +33,9 @@ bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr,
Target = Addr+Size+Imm; Target = Addr+Size+Imm;
return true; return true;
} }
Optional<uint64_t>
MCInstrAnalysis::evaluateMemoryOperandAddress(const MCInst &Inst, uint64_t Addr,
uint64_t Size) const {
return None;
}

29
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
View File

@ -399,6 +399,9 @@ public:
findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents, findPltEntries(uint64_t PltSectionVA, ArrayRef<uint8_t> PltContents,
uint64_t GotSectionVA, uint64_t GotSectionVA,
const Triple &TargetTriple) const override; const Triple &TargetTriple) const override;
Optional<uint64_t> evaluateMemoryOperandAddress(const MCInst &Inst,
uint64_t Addr,
uint64_t Size) const override;
}; };
#define GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS #define GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS
@ -511,7 +514,31 @@ std::vector<std::pair<uint64_t, uint64_t>> X86MCInstrAnalysis::findPltEntries(
return findX86_64PltEntries(PltSectionVA, PltContents); return findX86_64PltEntries(PltSectionVA, PltContents);
default: default:
return {}; return {};
} }
}
Optional<uint64_t> X86MCInstrAnalysis::evaluateMemoryOperandAddress(
const MCInst &Inst, uint64_t Addr, uint64_t Size) const {
const MCInstrDesc &MCID = Info->get(Inst.getOpcode());
int MemOpStart = X86II::getMemoryOperandNo(MCID.TSFlags);
if (MemOpStart == -1)
return None;
MemOpStart += X86II::getOperandBias(MCID);
const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg);
const MCOperand &BaseReg = Inst.getOperand(MemOpStart + X86::AddrBaseReg);
const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg);
const MCOperand &ScaleAmt = Inst.getOperand(MemOpStart + X86::AddrScaleAmt);
const MCOperand &Disp = Inst.getOperand(MemOpStart + X86::AddrDisp);
if (SegReg.getReg() != 0 || IndexReg.getReg() != 0 || ScaleAmt.getImm() != 1 ||
!Disp.isImm())
return None;
// RIP-relative addressing.
if (BaseReg.getReg() == X86::RIP)
return Addr + Size + Disp.getImm();
return None;
} }
} // end of namespace X86_MC } // end of namespace X86_MC