From 8fd8cf17aae62edb56e47c23794239501bc5b9ee Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Wed, 10 Jul 2019 19:58:13 +0000 Subject: [PATCH] [NFC][InstCombine] Comb through just-added "omit mask before left-shift" tests once more llvm-svn: 365694 --- ...dant-left-shift-input-masking-variant-a.ll | 32 +++--- ...dant-left-shift-input-masking-variant-b.ll | 28 +++--- ...dant-left-shift-input-masking-variant-c.ll | 8 +- ...dant-left-shift-input-masking-variant-d.ll | 98 ++++++++++++------- ...dant-left-shift-input-masking-variant-e.ll | 49 +++++++--- ...dant-left-shift-input-masking-variant-f.ll | 54 ++++++---- 6 files changed, 162 insertions(+), 107 deletions(-) diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll index e27efa65bbb..381b2851139 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll @@ -214,8 +214,8 @@ define i32 @t6_commutativity0(i32 %nbits) { ret i32 %t4 } -define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { -; CHECK-LABEL: @t6_commutativity1( +define i32 @t7_commutativity1(i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @t7_commutativity1( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = shl i32 1, [[NBITS1:%.*]] @@ -246,8 +246,8 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { %t6 = shl i32 %t4, %t5 ret i32 %t6 } -define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { -; CHECK-LABEL: @t6_commutativity2( +define i32 @t8_commutativity2(i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @t8_commutativity2( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = shl i32 1, [[NBITS1:%.*]] @@ -281,8 +281,8 @@ define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { ; Fast-math flags. We must not preserve them! -define i32 @t7_nuw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t7_nuw( +define i32 @t9_nuw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t9_nuw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -306,8 +306,8 @@ define i32 @t7_nuw(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @t8_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t8_nsw( +define i32 @t10_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t10_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -331,8 +331,8 @@ define i32 @t8_nsw(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t9_nuw_nsw( +define i32 @t11_nuw_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t11_nuw_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -358,8 +358,8 @@ define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n10(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n10( +define i32 @n12_not_minus_one(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n12_not_minus_one( ; CHECK-NEXT: [[T0:%.*]] = shl i32 2, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -383,8 +383,8 @@ define i32 @n10(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( +define i32 @n13_not_minus_one(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n13_not_minus_one( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], 2147483647 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -408,8 +408,8 @@ define i32 @n11(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @n12(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n12( +define i32 @n14_insifficient_sum(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n14_insifficient_sum( ; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = add nsw i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll index 8e82ffe4639..ac415438d68 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll @@ -214,8 +214,8 @@ define i32 @t6_commutativity0(i32 %nbits) { ret i32 %t4 } -define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { -; CHECK-LABEL: @t6_commutativity1( +define i32 @t7_commutativity1(i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @t7_commutativity1( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]] @@ -246,8 +246,8 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { %t6 = shl i32 %t4, %t5 ret i32 %t6 } -define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { -; CHECK-LABEL: @t6_commutativity2( +define i32 @t8_commutativity2(i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @t8_commutativity2( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]] @@ -281,8 +281,8 @@ define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { ; Fast-math flags. We must not preserve them! -define i32 @t7_nuw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t7_nuw( +define i32 @t9_nuw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t9_nuw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -306,8 +306,8 @@ define i32 @t7_nuw(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @t8_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t8_nsw( +define i32 @t10_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t10_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -331,8 +331,8 @@ define i32 @t8_nsw(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t9_nuw_nsw( +define i32 @t11_nuw_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t11_nuw_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -358,8 +358,8 @@ define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n10(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n10( +define i32 @n12_not_minus_one(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n12_not_minus_one( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -2, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -383,8 +383,8 @@ define i32 @n10(i32 %x, i32 %nbits) { ret i32 %t4 } -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( +define i32 @n13_insufficient_sum(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n13_insufficient_sum( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = xor i32 [[T0]], -1 ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll index cf47d96ca2b..45345819735 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll @@ -239,8 +239,8 @@ define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( +define i32 @n11_not_minus_one(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n11_not_minus_one( ; CHECK-NEXT: [[T0:%.*]] = lshr i32 -2, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[X:%.*]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -256,8 +256,8 @@ define i32 @n11(i32 %x, i32 %nbits) { ret i32 %t2 } -define i32 @n12(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n12( +define i32 @n12_shamt_is_smaller(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n12_shamt_is_smaller( ; CHECK-NEXT: [[T0:%.*]] = lshr i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = and i32 [[T0]], [[X:%.*]] ; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -1 diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll index 4505f32dd01..601e149274c 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll @@ -65,8 +65,8 @@ define i32 @t1_bigger_shift(i32 %x, i32 %nbits) { declare void @use3xi32(<3 x i32>) -define <3 x i32> @t3_vec_splat(<3 x i32> %x, <3 x i32> %nbits) { -; CHECK-LABEL: @t3_vec_splat( +define <3 x i32> @t2_vec_splat(<3 x i32> %x, <3 x i32> %nbits) { +; CHECK-LABEL: @t2_vec_splat( ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> , [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]] @@ -90,8 +90,8 @@ define <3 x i32> @t3_vec_splat(<3 x i32> %x, <3 x i32> %nbits) { ret <3 x i32> %t4 } -define <3 x i32> @t4_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) { -; CHECK-LABEL: @t4_vec_nonsplat( +define <3 x i32> @t3_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) { +; CHECK-LABEL: @t3_vec_nonsplat( ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> , [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]] @@ -115,8 +115,8 @@ define <3 x i32> @t4_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) { ret <3 x i32> %t4 } -define <3 x i32> @t5_vec_undef(<3 x i32> %x, <3 x i32> %nbits) { -; CHECK-LABEL: @t5_vec_undef( +define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) { +; CHECK-LABEL: @t4_vec_undef( ; CHECK-NEXT: [[T0:%.*]] = shl <3 x i32> , [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr <3 x i32> [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and <3 x i32> [[T1]], [[X:%.*]] @@ -143,8 +143,8 @@ define <3 x i32> @t5_vec_undef(<3 x i32> %x, <3 x i32> %nbits) { declare i32 @gen32() -define i32 @t6_commutativity0(i32 %nbits) { -; CHECK-LABEL: @t6_commutativity0( +define i32 @t5_commutativity0(i32 %nbits) { +; CHECK-LABEL: @t5_commutativity0( ; CHECK-NEXT: [[X:%.*]] = call i32 @gen32() ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] @@ -170,8 +170,8 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { ; CHECK-LABEL: @t6_commutativity1( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS0]] -; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS0]] -; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]] +; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1]] ; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) @@ -183,7 +183,7 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { ; %t0 = shl i32 -1, %nbits0 %t1 = lshr i32 %t0, %nbits0 - %t2 = shl i32 -1, %nbits0 + %t2 = shl i32 -1, %nbits1 %t3 = lshr i32 %t0, %nbits1 %t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask.. call void @use32(i32 %t0) @@ -194,12 +194,12 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) { %t5 = shl i32 %t4, %nbits0 ret i32 %t5 } -define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { -; CHECK-LABEL: @t6_commutativity2( +define i32 @t7_commutativity2(i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @t7_commutativity2( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS0:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS0]] -; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS0]] -; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: [[T2:%.*]] = shl i32 -1, [[NBITS1:%.*]] +; CHECK-NEXT: [[T3:%.*]] = lshr i32 [[T0]], [[NBITS1]] ; CHECK-NEXT: [[T4:%.*]] = and i32 [[T3]], [[T1]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) @@ -211,7 +211,7 @@ define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { ; %t0 = shl i32 -1, %nbits0 %t1 = lshr i32 %t0, %nbits0 - %t2 = shl i32 -1, %nbits0 + %t2 = shl i32 -1, %nbits1 %t3 = lshr i32 %t0, %nbits1 %t4 = and i32 %t3, %t1 ; both hands of 'and' could be mask.. call void @use32(i32 %t0) @@ -225,8 +225,8 @@ define i32 @t6_commutativity2(i32 %nbits0, i32 %nbits1) { ; Fast-math flags. We must not preserve them! -define i32 @t7_nuw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t7_nuw( +define i32 @t8_nuw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t8_nuw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -246,8 +246,8 @@ define i32 @t7_nuw(i32 %x, i32 %nbits) { ret i32 %t3 } -define i32 @t8_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t8_nsw( +define i32 @t9_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t9_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -267,8 +267,8 @@ define i32 @t8_nsw(i32 %x, i32 %nbits) { ret i32 %t3 } -define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t9_nuw_nsw( +define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t10_nuw_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] @@ -290,36 +290,58 @@ define i32 @t9_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n10(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n10( -; CHECK-NEXT: [[T0:%.*]] = shl i32 -2, [[NBITS:%.*]] -; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] -; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] +define i32 @n11_different_shamts0(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n11_different_shamts0( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS]] +; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS0]] ; CHECK-NEXT: ret i32 [[T3]] ; - %t0 = shl i32 -2, %nbits ; shifting not '-1' - %t1 = lshr i32 %t0, %nbits + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = lshr i32 %t0, %nbits1 ; different shift amts %t2 = and i32 %t1, %x call void @use32(i32 %t0) call void @use32(i32 %t1) call void @use32(i32 %t2) - %t3 = shl i32 %t2, %nbits + %t3 = shl i32 %t2, %nbits0 ret i32 %t3 } -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( -; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] -; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] -; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] +define i32 @n12_different_shamts1(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n12_different_shamts1( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T2]]) -; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[NBITS]] +; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS1]] +; CHECK-NEXT: ret i32 [[T3]] +; + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = lshr i32 %t0, %nbits1 ; different shift amts + %t2 = and i32 %t1, %x + call void @use32(i32 %t0) + call void @use32(i32 %t1) + call void @use32(i32 %t2) + %t3 = shl i32 %t2, %nbits1 + ret i32 %t3 +} + +define i32 @n13_shamt_is_smaller(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n13_shamt_is_smaller( +; CHECK-NEXT: [[T0:%.*]] = shl i32 -1, [[NBITS:%.*]] +; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] +; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], [[X:%.*]] +; CHECK-NEXT: [[T3:%.*]] = add i32 [[NBITS]], -1 +; CHECK-NEXT: call void @use32(i32 [[T0]]) +; CHECK-NEXT: call void @use32(i32 [[T1]]) +; CHECK-NEXT: call void @use32(i32 [[T2]]) +; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[T3]] ; CHECK-NEXT: ret i32 [[T4]] ; %t0 = shl i32 -1, %nbits @@ -329,6 +351,6 @@ define i32 @n11(i32 %x, i32 %nbits) { call void @use32(i32 %t0) call void @use32(i32 %t1) call void @use32(i32 %t2) - %t4 = shl i32 %t2, %nbits + %t4 = shl i32 %t2, %t3 ret i32 %t4 } diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll index a90aa29b9fc..691db006a01 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll @@ -122,8 +122,8 @@ define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) { ; Fast-math flags. We must not preserve them! -define i32 @t8_nuw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t8_nuw( +define i32 @t5_nuw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t5_nuw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -139,8 +139,8 @@ define i32 @t8_nuw(i32 %x, i32 %nbits) { ret i32 %t2 } -define i32 @t9_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t9_nsw( +define i32 @t6_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t6_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -156,8 +156,8 @@ define i32 @t9_nsw(i32 %x, i32 %nbits) { ret i32 %t2 } -define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t10_nuw_nsw( +define i32 @t7_nuw_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t7_nuw_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -175,25 +175,42 @@ define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( -; CHECK-NEXT: [[T0:%.*]] = shl i32 -2, [[NBITS:%.*]] -; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] +define i32 @n8_different_shamts0(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n8_different_shamts0( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS]] +; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS0]] ; CHECK-NEXT: ret i32 [[T2]] ; - %t0 = shl i32 -2, %nbits ; shifting not '-1' - %t1 = lshr i32 %t0, %nbits + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = lshr i32 %t0, %nbits1 ; different shift amts call void @use32(i32 %t0) call void @use32(i32 %t1) - %t2 = shl i32 %t1, %nbits + %t2 = shl i32 %t1, %nbits0 ret i32 %t2 } -define i32 @n12(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n12( +define i32 @n9_different_shamts1(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n9_different_shamts1( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: call void @use32(i32 [[T0]]) +; CHECK-NEXT: call void @use32(i32 [[T1]]) +; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS1]] +; CHECK-NEXT: ret i32 [[T2]] +; + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = lshr i32 %t0, %nbits1 ; different shift amts + call void @use32(i32 %t0) + call void @use32(i32 %t1) + %t2 = shl i32 %t1, %nbits1 + ret i32 %t2 +} + +define i32 @n10_shamt_is_smaller(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n10_shamt_is_smaller( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = lshr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -1 diff --git a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll index 4b1cdb0b7cc..cfdbe39c5cf 100644 --- a/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll +++ b/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll @@ -122,8 +122,8 @@ define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) { ; Fast-math flags. We must not preserve them! -define i32 @t8_nuw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t8_nuw( +define i32 @t5_nuw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t5_nuw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -139,8 +139,8 @@ define i32 @t8_nuw(i32 %x, i32 %nbits) { ret i32 %t2 } -define i32 @t9_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t9_nsw( +define i32 @t6_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t6_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -156,8 +156,8 @@ define i32 @t9_nsw(i32 %x, i32 %nbits) { ret i32 %t2 } -define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { -; CHECK-LABEL: @t10_nuw_nsw( +define i32 @t7_nuw_nsw(i32 %x, i32 %nbits) { +; CHECK-LABEL: @t7_nuw_nsw( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) @@ -175,33 +175,49 @@ define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) { ; Negative tests -define i32 @n11(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n11( -; CHECK-NEXT: [[T0:%.*]] = shl i32 -2, [[NBITS:%.*]] -; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS]] +define i32 @n8_different_shamts0(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n8_different_shamts0( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS1:%.*]] ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) -; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS]] +; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS0]] ; CHECK-NEXT: ret i32 [[T2]] ; - %t0 = shl i32 -2, %nbits ; shifting not '-1' - %t1 = ashr i32 %t0, %nbits + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = ashr i32 %t0, %nbits1 ; different shift amts call void @use32(i32 %t0) call void @use32(i32 %t1) - %t2 = shl i32 %t1, %nbits + %t2 = shl i32 %t1, %nbits0 ret i32 %t2 } -define i32 @n12(i32 %x, i32 %nbits) { -; CHECK-LABEL: @n12( +define i32 @n9_different_shamts1(i32 %x, i32 %nbits0, i32 %nbits1) { +; CHECK-LABEL: @n9_different_shamts1( +; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS0:%.*]] +; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS1:%.*]] +; CHECK-NEXT: call void @use32(i32 [[T0]]) +; CHECK-NEXT: call void @use32(i32 [[T1]]) +; CHECK-NEXT: [[T2:%.*]] = shl i32 [[T1]], [[NBITS1]] +; CHECK-NEXT: ret i32 [[T2]] +; + %t0 = shl i32 %x, %nbits0 ; different shift amts + %t1 = ashr i32 %t0, %nbits1 ; different shift amts + call void @use32(i32 %t0) + call void @use32(i32 %t1) + %t2 = shl i32 %t1, %nbits1 + ret i32 %t2 +} + +define i32 @n10_shamt_is_smaller(i32 %x, i32 %nbits) { +; CHECK-LABEL: @n10_shamt_is_smaller( ; CHECK-NEXT: [[T0:%.*]] = shl i32 [[X:%.*]], [[NBITS:%.*]] ; CHECK-NEXT: [[T1:%.*]] = ashr i32 [[T0]], [[NBITS]] ; CHECK-NEXT: [[T2:%.*]] = add i32 [[NBITS]], -1 ; CHECK-NEXT: call void @use32(i32 [[T0]]) ; CHECK-NEXT: call void @use32(i32 [[T1]]) ; CHECK-NEXT: call void @use32(i32 [[T2]]) -; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T1]], [[T2]] -; CHECK-NEXT: ret i32 [[T3]] +; CHECK-NEXT: ret i32 [[T2]] ; %t0 = shl i32 %x, %nbits %t1 = ashr i32 %t0, %nbits @@ -210,5 +226,5 @@ define i32 @n12(i32 %x, i32 %nbits) { call void @use32(i32 %t1) call void @use32(i32 %t2) %t3 = shl i32 %t1, %t2 ; shift is smaller than mask - ret i32 %t3 + ret i32 %t2 }