mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-19 02:52:53 +02:00
Remove the -live-regunits command line option.
Register allocators depend on it being permanently enabled now. llvm-svn: 158873
This commit is contained in:
parent
f3deae3d2f
commit
914857b29a
@ -27,7 +27,6 @@
|
|||||||
#include "llvm/Target/TargetRegisterInfo.h"
|
#include "llvm/Target/TargetRegisterInfo.h"
|
||||||
#include "llvm/Target/TargetInstrInfo.h"
|
#include "llvm/Target/TargetInstrInfo.h"
|
||||||
#include "llvm/Target/TargetMachine.h"
|
#include "llvm/Target/TargetMachine.h"
|
||||||
#include "llvm/Support/CommandLine.h"
|
|
||||||
#include "llvm/Support/Debug.h"
|
#include "llvm/Support/Debug.h"
|
||||||
#include "llvm/Support/ErrorHandling.h"
|
#include "llvm/Support/ErrorHandling.h"
|
||||||
#include "llvm/Support/raw_ostream.h"
|
#include "llvm/Support/raw_ostream.h"
|
||||||
@ -40,9 +39,6 @@
|
|||||||
#include <cmath>
|
#include <cmath>
|
||||||
using namespace llvm;
|
using namespace llvm;
|
||||||
|
|
||||||
// Temporary option to enable regunit liveness.
|
|
||||||
static cl::opt<bool> LiveRegUnits("live-regunits", cl::Hidden, cl::init(true));
|
|
||||||
|
|
||||||
STATISTIC(numIntervals , "Number of original intervals");
|
STATISTIC(numIntervals , "Number of original intervals");
|
||||||
|
|
||||||
char LiveIntervals::ID = 0;
|
char LiveIntervals::ID = 0;
|
||||||
@ -62,8 +58,7 @@ void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
|
|||||||
AU.addRequired<LiveVariables>();
|
AU.addRequired<LiveVariables>();
|
||||||
AU.addPreserved<LiveVariables>();
|
AU.addPreserved<LiveVariables>();
|
||||||
AU.addPreservedID(MachineLoopInfoID);
|
AU.addPreservedID(MachineLoopInfoID);
|
||||||
if (LiveRegUnits)
|
AU.addRequiredTransitiveID(MachineDominatorsID);
|
||||||
AU.addRequiredTransitiveID(MachineDominatorsID);
|
|
||||||
AU.addPreservedID(MachineDominatorsID);
|
AU.addPreservedID(MachineDominatorsID);
|
||||||
AU.addPreserved<SlotIndexes>();
|
AU.addPreserved<SlotIndexes>();
|
||||||
AU.addRequiredTransitive<SlotIndexes>();
|
AU.addRequiredTransitive<SlotIndexes>();
|
||||||
@ -109,9 +104,8 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
|
|||||||
AA = &getAnalysis<AliasAnalysis>();
|
AA = &getAnalysis<AliasAnalysis>();
|
||||||
LV = &getAnalysis<LiveVariables>();
|
LV = &getAnalysis<LiveVariables>();
|
||||||
Indexes = &getAnalysis<SlotIndexes>();
|
Indexes = &getAnalysis<SlotIndexes>();
|
||||||
if (LiveRegUnits)
|
DomTree = &getAnalysis<MachineDominatorTree>();
|
||||||
DomTree = &getAnalysis<MachineDominatorTree>();
|
if (!LRCalc)
|
||||||
if (LiveRegUnits && !LRCalc)
|
|
||||||
LRCalc = new LiveRangeCalc();
|
LRCalc = new LiveRangeCalc();
|
||||||
AllocatableRegs = TRI->getAllocatableSet(fn);
|
AllocatableRegs = TRI->getAllocatableSet(fn);
|
||||||
ReservedRegs = TRI->getReservedRegs(fn);
|
ReservedRegs = TRI->getReservedRegs(fn);
|
||||||
@ -120,9 +114,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
|
|||||||
|
|
||||||
numIntervals += getNumIntervals();
|
numIntervals += getNumIntervals();
|
||||||
|
|
||||||
if (LiveRegUnits) {
|
computeLiveInRegUnits();
|
||||||
computeLiveInRegUnits();
|
|
||||||
}
|
|
||||||
|
|
||||||
DEBUG(dump());
|
DEBUG(dump());
|
||||||
return true;
|
return true;
|
||||||
|
@ -1,5 +1,4 @@
|
|||||||
; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
|
; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
|
||||||
; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup -live-regunits < %s
|
|
||||||
; REQUIRES: asserts
|
; REQUIRES: asserts
|
||||||
;
|
;
|
||||||
; Interesting MachineScheduler cases.
|
; Interesting MachineScheduler cases.
|
||||||
|
Loading…
Reference in New Issue
Block a user