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The current implementation does not allow more than 32 types to be properly handled with target lowering. This doubles the size to 64bit types and easily allows extension to more types.
llvm-svn: 163806
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0dfb857822
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@ -497,7 +497,8 @@ public:
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(unsigned)VT.getSimpleVT().SimpleTy < sizeof(CondCodeActions[0])*4 &&
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"Table isn't big enough!");
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LegalizeAction Action = (LegalizeAction)
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((CondCodeActions[CC] >> (2*VT.getSimpleVT().SimpleTy)) & 3);
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((CondCodeActions[CC][VT.getSimpleVT().SimpleTy >> 5]
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>> (2*(VT.getSimpleVT().SimpleTy & 0x1F))) & 3);
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assert(Action != Promote && "Can't promote condition code!");
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return Action;
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}
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@ -554,6 +555,7 @@ public:
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}
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return EVT::getEVT(Ty, AllowUnknown);
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}
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/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
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/// function arguments in the caller parameter area. This is the actual
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@ -1153,8 +1155,10 @@ protected:
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assert(VT < MVT::LAST_VALUETYPE &&
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(unsigned)CC < array_lengthof(CondCodeActions) &&
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"Table isn't big enough!");
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CondCodeActions[(unsigned)CC] &= ~(uint64_t(3UL) << VT.SimpleTy*2);
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CondCodeActions[(unsigned)CC] |= (uint64_t)Action << VT.SimpleTy*2;
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CondCodeActions[(unsigned)CC][VT.SimpleTy >> 5]
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&= ~(uint64_t(3UL) << (VT.SimpleTy & 0x1F)*2);
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CondCodeActions[(unsigned)CC][VT.SimpleTy >> 5]
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|= (uint64_t)Action << (VT.SimpleTy & 0x1F)*2;
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}
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/// AddPromotedToType - If Opc/OrigVT is specified as being promoted, the
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@ -1933,7 +1937,7 @@ private:
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/// CondCodeActions - For each condition code (ISD::CondCode) keep a
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/// LegalizeAction that indicates how instruction selection should
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/// deal with the condition code.
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uint64_t CondCodeActions[ISD::SETCC_INVALID];
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uint64_t CondCodeActions[ISD::SETCC_INVALID][2];
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ValueTypeActionImpl ValueTypeActions;
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