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[X86] Remove hasSideEffects=1 from the X87 pseudos with folded load.

This was done in r321424 to prevent scheduling from reordering things. But now that we model FPCW as a dependency, I don't think the same scheduling we were trying to prevent can occur.

llvm-svn: 354628
This commit is contained in:
Craig Topper 2019-02-21 22:00:15 +00:00
parent 03c39fa07c
commit 920598ad23
2 changed files with 5 additions and 3 deletions

View File

@ -180,7 +180,6 @@ def _Fp80 : FpI_<(outs RFP80:$dst), (ins RFP80:$src1, RFP80:$src2), TwoArgFP,
// These instructions cannot address 80-bit memory.
multiclass FPBinary<SDNode OpNode, Format fp, string asmstring,
bit Forward = 1> {
let mayLoad = 1, hasSideEffects = 1 in {
// ST(0) = ST(0) + [mem]
def _Fp32m : FpIf32<(outs RFP32:$dst),
(ins RFP32:$src1, f32mem:$src2), OneArgFPRW,
@ -217,8 +216,10 @@ def _Fp80m64: FpI_<(outs RFP80:$dst),
(OpNode RFP80:$src1, (f80 (extloadf64 addr:$src2)))),
(set RFP80:$dst,
(OpNode (f80 (extloadf64 addr:$src2)), RFP80:$src1)))]>;
let mayLoad = 1 in
def _F32m : FPI<0xD8, fp, (outs), (ins f32mem:$src),
!strconcat("f", asmstring, "{s}\t$src")>;
let mayLoad = 1 in
def _F64m : FPI<0xDC, fp, (outs), (ins f64mem:$src),
!strconcat("f", asmstring, "{l}\t$src")>;
// ST(0) = ST(0) + [memint]
@ -264,11 +265,12 @@ def _FpI32m80 : FpI_<(outs RFP80:$dst), (ins RFP80:$src1, i32mem:$src2),
(OpNode RFP80:$src1, (X86fild32 addr:$src2))),
(set RFP80:$dst,
(OpNode (X86fild32 addr:$src2), RFP80:$src1)))]>;
let mayLoad = 1 in
def _FI16m : FPI<0xDE, fp, (outs), (ins i16mem:$src),
!strconcat("fi", asmstring, "{s}\t$src")>;
let mayLoad = 1 in
def _FI32m : FPI<0xDA, fp, (outs), (ins i32mem:$src),
!strconcat("fi", asmstring, "{l}\t$src")>;
} // mayLoad = 1, hasSideEffects = 1
}
let Defs = [FPSW], Uses = [FPCW] in {

View File

@ -62,13 +62,13 @@ define void @computeJD(%struct.DateTime*) nounwind {
; CHECK-NEXT: imull $60000, 24(%ebx), %ecx # imm = 0xEA60
; CHECK-NEXT: addl %eax, %ecx
; CHECK-NEXT: fldl 28(%ebx)
; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: sarl $31, %eax
; CHECK-NEXT: fmuls {{\.LCPI.*}}
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)