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Don't scan physreg use-def chains looking for a PIC base.
We can't rematerialize a PIC base after register allocation anyway, and scanning physreg use-def chains is very expensive in a function with many calls. <rdar://problem/12047515> llvm-svn: 161461
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@ -1463,6 +1463,9 @@ unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
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/// regIsPICBase - Return true if register is PIC base (i.e.g defined by
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/// X86::MOVPC32r.
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static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) {
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// Don't waste compile time scanning use-def chains of physregs.
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if (!TargetRegisterInfo::isVirtualRegister(BaseReg))
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return false;
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bool isPICBase = false;
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for (MachineRegisterInfo::def_iterator I = MRI.def_begin(BaseReg),
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E = MRI.def_end(); I != E; ++I) {
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@ -1520,16 +1523,7 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
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return false;
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const MachineFunction &MF = *MI->getParent()->getParent();
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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bool isPICBase = false;
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for (MachineRegisterInfo::def_iterator I = MRI.def_begin(BaseReg),
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E = MRI.def_end(); I != E; ++I) {
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MachineInstr *DefMI = I.getOperand().getParent();
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if (DefMI->getOpcode() != X86::MOVPC32r)
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return false;
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assert(!isPICBase && "More than one PIC base?");
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isPICBase = true;
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}
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return isPICBase;
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return regIsPICBase(BaseReg, MRI);
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}
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return false;
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}
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