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[ARM64] Properly support both apple and standard syntax for FMOV
llvm-svn: 205896
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f3c6d7d337
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@ -3277,8 +3277,10 @@ class BaseUnscaledConversion<bits<2> rmode, bits<3> opcode,
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let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
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class BaseUnscaledConversionToHigh<bits<2> rmode, bits<3> opcode,
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RegisterClass srcType, RegisterOperand dstType, string asm>
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: I<(outs dstType:$Rd), (ins srcType:$Rn), asm, "\t$Rd[1], $Rn", "", []>,
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RegisterClass srcType, RegisterOperand dstType, string asm,
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string kind>
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: I<(outs dstType:$Rd), (ins srcType:$Rn), asm,
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"{\t$Rd"#kind#"[1], $Rn|"#kind#"\t$Rd[1], $Rn}", "", []>,
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Sched<[WriteFCopy]> {
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bits<5> Rd;
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bits<5> Rn;
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@ -3293,8 +3295,10 @@ class BaseUnscaledConversionToHigh<bits<2> rmode, bits<3> opcode,
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let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in
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class BaseUnscaledConversionFromHigh<bits<2> rmode, bits<3> opcode,
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RegisterOperand srcType, RegisterClass dstType, string asm>
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: I<(outs dstType:$Rd), (ins srcType:$Rn), asm, "\t$Rd, $Rn[1]", "", []>,
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RegisterOperand srcType, RegisterClass dstType, string asm,
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string kind>
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: I<(outs dstType:$Rd), (ins srcType:$Rn), asm,
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"{\t$Rd, $Rn"#kind#"[1]|"#kind#"\t$Rd, $Rn[1]}", "", []>,
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Sched<[WriteFCopy]> {
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bits<5> Rd;
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bits<5> Rn;
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@ -3331,21 +3335,16 @@ multiclass UnscaledConversion<string asm> {
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}
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def XDHighr : BaseUnscaledConversionToHigh<0b01, 0b111, GPR64, V128,
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asm#".d"> {
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asm, ".d"> {
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let Inst{31} = 1;
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let Inst{22} = 0;
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}
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def DXHighr : BaseUnscaledConversionFromHigh<0b01, 0b110, V128, GPR64,
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asm#".d"> {
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asm, ".d"> {
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let Inst{31} = 1;
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let Inst{22} = 0;
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}
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def : InstAlias<asm#"$Vd.d[1], $Rn",
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(!cast<Instruction>(NAME#XDHighr) V128:$Vd, GPR64:$Rn), 0>;
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def : InstAlias<asm#"$Rd, $Vn.d[1]",
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(!cast<Instruction>(NAME#DXHighr) GPR64:$Rd, V128:$Vn), 0>;
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}
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//---
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@ -1,4 +1,4 @@
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; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s
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; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding -output-asm-variant=1 < %s | FileCheck %s
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foo:
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;-----------------------------------------------------------------------------
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7
test/MC/Disassembler/ARM64/non-apple-fmov.txt
Normal file
7
test/MC/Disassembler/ARM64/non-apple-fmov.txt
Normal file
@ -0,0 +1,7 @@
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# RUN: llvm-mc -triple arm64 -disassemble < %s | FileCheck %s
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0x00 0x00 0xae 0x9e
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0x00 0x00 0xaf 0x9e
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# CHECK: fmov x0, v0.d[1]
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# CHECK: fmov v0.d[1], x0
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@ -1,4 +1,4 @@
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# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple arm64-apple-darwin --disassemble -output-asm-variant=1 < %s | FileCheck %s
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#-----------------------------------------------------------------------------
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# Floating-point arithmetic
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