RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Code Issues Projects Releases Wiki Activity

[CSSPGO] Fix an AV caused by a block that has only pseudo pseudo instructions.

Browse Source 
Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D101415
This commit is contained in:
Hongtao Yu 2021-04-27 17:16:29 -07:00
parent 41672a71c6
commit 92586868ec
1 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/CodeGen/RegAllocGreedy.cpp
View File

@ -1324,10 +1324,10 @@ bool RAGreedy::addThroughConstraints(InterferenceCache::Cursor Intf,
// Abort if the spill cannot be inserted at the MBB' start
MachineBasicBlock *MBB = MF->getBlockNumbered(Number);
if (!MBB->empty() &&
SlotIndex::isEarlierInstr(
LIS->getInstructionIndex(*MBB->getFirstNonDebugInstr()),
SA->getFirstSplitPoint(Number)))
auto FirstNonDebugInstr = MBB->getFirstNonDebugInstr();
if (FirstNonDebugInstr != MBB->end() &&
SlotIndex::isEarlierInstr(LIS->getInstructionIndex(*FirstNonDebugInstr),
SA->getFirstSplitPoint(Number)))
return false;
// Interference for the live-in value.
if (Intf.first() <= Indexes->getMBBStartIdx(Number))