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[InstCombine] dropRedundantMaskingOfLeftShiftInput(): check that adding shift amounts doesn't overflow (PR49778)

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This is identical to 781d077afb0ed9771c513d064c40170c1ccd21c9,
but for the other function.

For certain shift amount bit widths, we must first ensure that adding
shift amounts is safe, that the sum won't have an unsigned overflow.

Fixes https://bugs.llvm.org/show_bug.cgi?id=49778
This commit is contained in:
Roman Lebedev 2021-04-04 23:25:29 +03:00
parent 1455781b8c
commit 92ea6fc135
2 changed files with 12 additions and 7 deletions
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12
lib/Transforms/InstCombine/InstCombineShifts.cpp
View File

@ -226,9 +226,9 @@ dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
// Peek through an optional zext of the shift amount.
match(MaskShAmt, m_ZExtOrSelf(m_Value(MaskShAmt)));
// We have two shift amounts from two different shifts. The types of those
// shift amounts may not match. If that's the case let's bailout now.
if (MaskShAmt->getType() != ShiftShAmt->getType())
// Verify that it would be safe to try to add those two shift amounts.
if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked,
MaskShAmt))
return nullptr;
// Can we simplify (MaskShAmt+ShiftShAmt) ?
@ -258,9 +258,9 @@ dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
// Peek through an optional zext of the shift amount.
match(MaskShAmt, m_ZExtOrSelf(m_Value(MaskShAmt)));
// We have two shift amounts from two different shifts. The types of those
// shift amounts may not match. If that's the case let's bailout now.
if (MaskShAmt->getType() != ShiftShAmt->getType())
// Verify that it would be safe to try to add those two shift amounts.
if (!canTryToConstantAddTwoShiftAmounts(OuterShift, ShiftShAmt, Masked,
MaskShAmt))
return nullptr;
// Can we simplify (ShiftShAmt-MaskShAmt) ?

7
test/Transforms/InstCombine/redundant-left-shift-input-masking-pr49778.ll
View File

@ -4,7 +4,12 @@
; PR49778: this should not be folded to 0.
define i32 @src(i1 %x2) {
; CHECK-LABEL: @src(
; CHECK-NEXT: ret i32 0
; CHECK-NEXT: [[X13:%.*]] = zext i1 [[X2:%.*]] to i32
; CHECK-NEXT: [[_7:%.*]] = shl i32 -1, [[X13]]
; CHECK-NEXT: [[MASK:%.*]] = xor i32 [[_7]], -1
; CHECK-NEXT: [[_8:%.*]] = and i32 [[MASK]], [[X13]]
; CHECK-NEXT: [[_9:%.*]] = shl i32 [[_8]], [[X13]]
; CHECK-NEXT: ret i32 [[_9]]
;
%x13 = zext i1 %x2 to i32
%_7 = shl i32 4294967295, %x13