mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 03:02:36 +01:00
[llvm-exegesis] Ignore X86 pseudo instructions.
Summary: They do not lower to actual MCInsts and have no scheduling info. Reviewers: gchatelet Subscribers: llvm-commits, tschuett Differential Revision: https://reviews.llvm.org/D54147 llvm-svn: 346227
This commit is contained in:
parent
f6458112a8
commit
9307155a7b
@ -75,6 +75,9 @@ getMemoryOperandRanges(llvm::ArrayRef<Operand> Operands) {
|
|||||||
|
|
||||||
static llvm::Error IsInvalidOpcode(const Instruction &Instr) {
|
static llvm::Error IsInvalidOpcode(const Instruction &Instr) {
|
||||||
const auto OpcodeName = Instr.Name;
|
const auto OpcodeName = Instr.Name;
|
||||||
|
if ((Instr.Description->TSFlags & X86II::FormMask) == X86II::Pseudo)
|
||||||
|
return llvm::make_error<BenchmarkFailure>(
|
||||||
|
"unsupported opcode: pseudo instruction");
|
||||||
if (OpcodeName.startswith("POPF") || OpcodeName.startswith("PUSHF") ||
|
if (OpcodeName.startswith("POPF") || OpcodeName.startswith("PUSHF") ||
|
||||||
OpcodeName.startswith("ADJCALLSTACK"))
|
OpcodeName.startswith("ADJCALLSTACK"))
|
||||||
return llvm::make_error<BenchmarkFailure>(
|
return llvm::make_error<BenchmarkFailure>(
|
||||||
|
Loading…
Reference in New Issue
Block a user