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Reapply "[CGP] Check for existing inttotpr before creating new one"

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Original commit: r351582

llvm-svn: 351618
This commit is contained in:
Roman Tereshin 2019-01-19 01:41:03 +00:00
parent 99e3981f53
commit 93a211ddee
2 changed files with 81 additions and 4 deletions
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21
lib/CodeGen/CodeGenPrepare.cpp
View File

@ -4664,13 +4664,26 @@ bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
// will look through it and provide only the integer value. In that case,
// use it here.
if (!DL->isNonIntegralPointerType(Addr->getType())) {
const auto getResultPtr = [MemoryInst, Addr,
&Builder](Value *Reg) -> Value * {
BasicBlock *BB = MemoryInst->getParent();
for (User *U : Reg->users())
if (auto *I2P = dyn_cast<IntToPtrInst>(U))
if (I2P->getType() == Addr->getType() && I2P->getParent() == BB) {
if (isa<Instruction>(Reg) &&
cast<Instruction>(Reg)->getParent() == BB)
I2P->moveAfter(cast<Instruction>(Reg));
else
I2P->moveBefore(BB->getFirstNonPHI());
return I2P;
}
return Builder.CreateIntToPtr(Reg, Addr->getType(), "sunkaddr");
};
if (!ResultPtr && AddrMode.BaseReg) {
ResultPtr = Builder.CreateIntToPtr(AddrMode.BaseReg, Addr->getType(),
"sunkaddr");
ResultPtr = getResultPtr(AddrMode.BaseReg);
AddrMode.BaseReg = nullptr;
} else if (!ResultPtr && AddrMode.Scale == 1) {
ResultPtr = Builder.CreateIntToPtr(AddrMode.ScaledReg, Addr->getType(),
"sunkaddr");
ResultPtr = getResultPtr(AddrMode.ScaledReg);
AddrMode.Scale = 0;
}
}

64
test/Transforms/CodeGenPrepare/X86/sink-addrmode-cse-inttoptrs.ll Normal file
View File

@ -0,0 +1,64 @@
; RUN: opt -mtriple=x86_64-- -codegenprepare %s -S -o - | FileCheck %s --check-prefixes=CGP,COMMON
; RUN: opt -mtriple=x86_64-- -codegenprepare -load-store-vectorizer %s -S -o - | FileCheck %s --check-prefixes=LSV,COMMON
; Make sure CodeGenPrepare doesn't emit multiple inttoptr instructions
; of the same integer value while sinking address computations, but
; rather CSEs them on the fly: excessive inttoptr's confuse SCEV
; into thinking that related pointers have nothing to do with each other.
;
; Triggering this problem involves having just right addressing modes,
; and verifying that the motivating pass (LoadStoreVectorizer) is able
; to benefit from it - just right LSV-policies. Hence the atypical combination
; of the target and datalayout / address spaces in this test.
target datalayout = "p1:32:32:32"
define void @test1(i32 %tmp, i32 %off) {
; COMMON-LABEL: @test1
; CGP: = inttoptr
; CGP-NOT: = inttoptr
; LSV: = load <2 x float>
; LSV: = load <2 x float>
entry:
%tmp1 = inttoptr i32 %tmp to float addrspace(1)*
%arrayidx.i.7 = getelementptr inbounds float, float addrspace(1)* %tmp1, i32 %off
%add20.i.7 = add i32 %off, 1
%arrayidx22.i.7 = getelementptr inbounds float, float addrspace(1)* %tmp1, i32 %add20.i.7
br label %for.body
for.body:
%tmp8 = phi float [ undef, %entry ], [ %tmp62, %for.body ]
%tmp28 = load float, float addrspace(1)* %arrayidx.i.7
%tmp29 = load float, float addrspace(1)* %arrayidx22.i.7
%arrayidx.i321.7 = getelementptr inbounds float, float addrspace(1)* %tmp1, i32 0
%tmp43 = load float, float addrspace(1)* %arrayidx.i321.7
%arrayidx22.i327.7 = getelementptr inbounds float, float addrspace(1)* %tmp1, i32 1
%tmp44 = load float, float addrspace(1)* %arrayidx22.i327.7
%tmp62 = tail call fast float @foo(float %tmp8, float %tmp44, float %tmp43, float %tmp29, float %tmp28)
br label %for.body
}
define void @test2(i64 %a, i64 %b, i64 %c) {
; COMMON-LABEL: @test2
; CGP: loop:
; CGP-NEXT: %mul =
; CGP-NEXT: = inttoptr i64 %mul
; CGP-NOT: = inttoptr
; LSV: store <2 x i64>
entry:
%mul.neg.i630 = add nsw i64 %a, -16
br label %loop
loop:
%mul = mul nsw i64 %b, -16
%sub.i631 = add nsw i64 %mul.neg.i630, %mul
%tmp = inttoptr i64 %sub.i631 to i8*
%tmp1 = inttoptr i64 %sub.i631 to i64*
store i64 %c, i64* %tmp1, align 16
%arrayidx172 = getelementptr inbounds i8, i8* %tmp, i64 8
%tmp2 = bitcast i8* %arrayidx172 to i64*
store i64 42, i64* %tmp2, align 8
br label %loop
}
declare float @foo(float, float, float, float, float)