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[TableGen] Replace InfoByHwMode::getAsString with writeToStream

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Also add operator<< for use with raw_ostream to InfoByHwMode and its
derived classes.

Recommitting r313989 with the fix for unresolved references: explicitly
define the operator<< in namespace llvm.

llvm-svn: 314004
This commit is contained in:
Krzysztof Parzyszek 2017-09-22 18:29:37 +00:00
parent af71947aaf
commit 940990d757
5 changed files with 56 additions and 33 deletions
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10
utils/TableGen/CodeGenDAGPatterns.cpp
View File

@ -238,10 +238,16 @@ bool TypeSetByHwMode::operator==(const TypeSetByHwMode &VTS) const {
return true;
}
namespace llvm {
raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
T.writeToStream(OS);
return OS;
}
}
LLVM_DUMP_METHOD
void TypeSetByHwMode::dump() const {
writeToStream(dbgs());
dbgs() << '\n';
dbgs() << *this << '\n';
}
bool TypeSetByHwMode::intersect(SetType &Out, const SetType &In) {

2
utils/TableGen/CodeGenDAGPatterns.h
View File

@ -240,6 +240,8 @@ private:
bool intersect(SetType &Out, const SetType &In);
};
raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T);
struct TypeInfer {
TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {}

2
utils/TableGen/CodeGenRegisters.cpp
View File

@ -836,7 +836,7 @@ bool CodeGenRegisterClass::contains(const CodeGenRegister *Reg) const {
namespace llvm {
raw_ostream &operator<<(raw_ostream &OS, const CodeGenRegisterClass::Key &K) {
OS << "{ " << K.RSI.getAsString();
OS << "{ " << K.RSI;
for (const auto R : *K.Members)
OS << ", " << R->getName();
return OS << " }";

63
utils/TableGen/InfoByHwMode.cpp
View File

@ -76,34 +76,31 @@ StringRef ValueTypeByHwMode::getMVTName(MVT T) {
return N;
}
std::string ValueTypeByHwMode::getAsString() const {
if (isSimple())
return getMVTName(getSimple());
void ValueTypeByHwMode::writeToStream(raw_ostream &OS) const {
if (isSimple()) {
OS << getMVTName(getSimple());
return;
}
std::vector<const PairType*> Pairs;
for (const auto &P : Map)
Pairs.push_back(&P);
std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
std::stringstream str;
str << '{';
OS << '{';
for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
const PairType *P = Pairs[i];
str << '(' << getModeName(P->first)
<< ':' << getMVTName(P->second).str() << ')';
OS << '(' << getModeName(P->first)
<< ':' << getMVTName(P->second).str() << ')';
if (i != e-1)
str << ',';
OS << ',';
}
str << '}';
return str.str();
OS << '}';
}
LLVM_DUMP_METHOD
void ValueTypeByHwMode::dump() const {
dbgs() << "size=" << Map.size() << '\n';
for (const auto &P : Map)
dbgs() << " " << P.first << " -> "
<< llvm::getEnumName(P.second.SimpleTy) << '\n';
dbgs() << *this << '\n';
}
ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec,
@ -136,11 +133,9 @@ bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const {
SpillSize <= I.SpillSize;
}
std::string RegSizeInfo::getAsString() const {
std::stringstream str;
str << "[R=" << RegSize << ",S=" << SpillSize
<< ",A=" << SpillAlignment << ']';
return str.str();
void RegSizeInfo::writeToStream(raw_ostream &OS) const {
OS << "[R=" << RegSize << ",S=" << SpillSize
<< ",A=" << SpillAlignment << ']';
}
RegSizeInfoByHwMode::RegSizeInfoByHwMode(Record *R,
@ -177,22 +172,36 @@ bool RegSizeInfoByHwMode::hasStricterSpillThan(const RegSizeInfoByHwMode &I)
std::tie(B0.SpillSize, B0.SpillAlignment);
}
std::string RegSizeInfoByHwMode::getAsString() const {
void RegSizeInfoByHwMode::writeToStream(raw_ostream &OS) const {
typedef typename decltype(Map)::value_type PairType;
std::vector<const PairType*> Pairs;
for (const auto &P : Map)
Pairs.push_back(&P);
std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
std::stringstream str;
str << '{';
OS << '{';
for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
const PairType *P = Pairs[i];
str << '(' << getModeName(P->first)
<< ':' << P->second.getAsString() << ')';
OS << '(' << getModeName(P->first) << ':' << P->second << ')';
if (i != e-1)
str << ',';
OS << ',';
}
OS << '}';
}
namespace llvm {
raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
T.writeToStream(OS);
return OS;
}
raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
T.writeToStream(OS);
return OS;
}
raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
T.writeToStream(OS);
return OS;
}
str << '}';
return str.str();
}

12
utils/TableGen/InfoByHwMode.h
View File

@ -27,6 +27,7 @@ namespace llvm {
struct CodeGenHwModes;
class Record;
class raw_ostream;
template <typename InfoT> struct InfoByHwMode;
@ -130,7 +131,7 @@ struct ValueTypeByHwMode : public InfoByHwMode<MVT> {
MVT &getOrCreateTypeForMode(unsigned Mode, MVT Type);
static StringRef getMVTName(MVT T);
std::string getAsString() const;
void writeToStream(raw_ostream &OS) const;
void dump() const;
};
@ -154,7 +155,7 @@ struct RegSizeInfo {
}
bool isSubClassOf(const RegSizeInfo &I) const;
std::string getAsString() const;
void writeToStream(raw_ostream &OS) const;
};
struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
@ -169,8 +170,13 @@ struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
bool isSubClassOf(const RegSizeInfoByHwMode &I) const;
bool hasStricterSpillThan(const RegSizeInfoByHwMode &I) const;
std::string getAsString() const;
void writeToStream(raw_ostream &OS) const;
};
raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T);
raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T);
} // namespace llvm
#endif // LLVM_UTILS_TABLEGEN_INFOBYHWMODE_H