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[SPARC] Recognize and handle the %lm(sym) operator
Reviewed By: joerg Differential Revision: https://reviews.llvm.org/D77737
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@ -52,6 +52,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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case Sparc::fixup_sparc_tls_ldm_hi22:
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case Sparc::fixup_sparc_tls_ie_hi22:
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case Sparc::fixup_sparc_hi22:
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case Sparc::fixup_sparc_lm:
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return (Value >> 10) & 0x3fffff;
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case Sparc::fixup_sparc_got13:
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@ -146,6 +147,7 @@ namespace {
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{ "fixup_sparc_l44", 20, 12, 0 },
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{ "fixup_sparc_hh", 10, 22, 0 },
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{ "fixup_sparc_hm", 22, 10, 0 },
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{ "fixup_sparc_lm", 10, 22, 0 },
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{ "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_sparc_got22", 10, 22, 0 },
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@ -187,6 +189,7 @@ namespace {
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{ "fixup_sparc_l44", 0, 12, 0 },
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{ "fixup_sparc_hh", 0, 22, 0 },
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{ "fixup_sparc_hm", 0, 10, 0 },
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{ "fixup_sparc_lm", 0, 22, 0 },
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{ "fixup_sparc_pc22", 0, 22, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_sparc_pc10", 0, 10, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_sparc_got22", 0, 22, 0 },
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@ -86,6 +86,7 @@ unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
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case Sparc::fixup_sparc_l44: return ELF::R_SPARC_L44;
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case Sparc::fixup_sparc_hh: return ELF::R_SPARC_HH22;
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case Sparc::fixup_sparc_hm: return ELF::R_SPARC_HM10;
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case Sparc::fixup_sparc_lm: return ELF::R_SPARC_LM22;
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case Sparc::fixup_sparc_got22: return ELF::R_SPARC_GOT22;
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case Sparc::fixup_sparc_got10: return ELF::R_SPARC_GOT10;
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case Sparc::fixup_sparc_got13: return ELF::R_SPARC_GOT13;
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@ -54,6 +54,9 @@ namespace llvm {
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/// fixup_sparc_hm - 10-bit fixup corresponding to %hm(foo)
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fixup_sparc_hm,
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/// fixup_sparc_lm - 22-bit fixup corresponding to %lm(foo)
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fixup_sparc_lm,
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/// fixup_sparc_pc22 - 22-bit fixup corresponding to %pc22(foo)
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fixup_sparc_pc22,
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@ -50,6 +50,7 @@ bool SparcMCExpr::printVariantKind(raw_ostream &OS, VariantKind Kind)
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case VK_Sparc_L44: OS << "%l44("; return true;
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case VK_Sparc_HH: OS << "%hh("; return true;
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case VK_Sparc_HM: OS << "%hm("; return true;
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case VK_Sparc_LM: OS << "%lm("; return true;
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// FIXME: use %pc22/%pc10, if system assembler supports them.
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case VK_Sparc_PC22: OS << "%hi("; return true;
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case VK_Sparc_PC10: OS << "%lo("; return true;
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@ -93,6 +94,7 @@ SparcMCExpr::VariantKind SparcMCExpr::parseVariantKind(StringRef name)
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.Case("l44", VK_Sparc_L44)
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.Case("hh", VK_Sparc_HH)
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.Case("hm", VK_Sparc_HM)
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.Case("lm", VK_Sparc_LM)
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.Case("pc22", VK_Sparc_PC22)
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.Case("pc10", VK_Sparc_PC10)
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.Case("got22", VK_Sparc_GOT22)
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@ -130,6 +132,7 @@ Sparc::Fixups SparcMCExpr::getFixupKind(SparcMCExpr::VariantKind Kind) {
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case VK_Sparc_L44: return Sparc::fixup_sparc_l44;
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case VK_Sparc_HH: return Sparc::fixup_sparc_hh;
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case VK_Sparc_HM: return Sparc::fixup_sparc_hm;
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case VK_Sparc_LM: return Sparc::fixup_sparc_lm;
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case VK_Sparc_PC22: return Sparc::fixup_sparc_pc22;
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case VK_Sparc_PC10: return Sparc::fixup_sparc_pc10;
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case VK_Sparc_GOT22: return Sparc::fixup_sparc_got22;
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@ -31,6 +31,7 @@ public:
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VK_Sparc_L44,
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VK_Sparc_HH,
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VK_Sparc_HM,
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VK_Sparc_LM,
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VK_Sparc_PC22,
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VK_Sparc_PC10,
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VK_Sparc_GOT22,
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@ -303,6 +303,7 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
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assert((TF == SparcMCExpr::VK_Sparc_HI
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|| TF == SparcMCExpr::VK_Sparc_H44
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|| TF == SparcMCExpr::VK_Sparc_HH
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|| TF == SparcMCExpr::VK_Sparc_LM
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|| TF == SparcMCExpr::VK_Sparc_TLS_GD_HI22
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDM_HI22
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|| TF == SparcMCExpr::VK_Sparc_TLS_LDO_HIX22
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@ -11,6 +11,7 @@
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! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_L44 sym
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! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HH22 sym
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! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_HM10 sym
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! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_LM22 sym
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! CHECK-OBJ: 0x{{[0-9,A-F]+}} R_SPARC_13 sym
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! CHECK-ELF: ]
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@ -46,6 +47,10 @@
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! CHECK-NEXT: ! fixup A - offset: 0, value: %hm(sym), kind: fixup_sparc_hm
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or %g1, %hm(sym), %g3
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! CHECK: sethi %lm(sym), %l0 ! encoding: [0x21,0b00AAAAAA,A,A]
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! CHECK-NEXT: ! fixup A - offset: 0, value: %lm(sym), kind: fixup_sparc_lm
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sethi %lm(sym), %l0
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! CHECK: or %g1, sym, %g3 ! encoding: [0x86,0x10,0b011AAAAA,A]
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! CHECK-NEXT: ! fixup A - offset: 0, value: sym, kind: fixup_sparc_13
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or %g1, sym, %g3
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