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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00

[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.

It is necessary to generate fixups in .debug_frame or .eh_frame as
relaxation is enabled due to the address delta may be changed after
relaxation.

There is an opcode with 6-bits data in debug frame encoding. So, we
also need 6-bits fixup types.

Differential Revision: https://reviews.llvm.org/D58335

llvm-svn: 366442
This commit is contained in:
Hsiangkai Wang 2019-07-18 14:47:34 +00:00
parent d2a4d69930
commit 945bcd9b26
18 changed files with 244 additions and 101 deletions

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@ -69,7 +69,7 @@ public:
/// starting at *Offset and ending at EndOffset. *Offset is updated
/// to EndOffset upon successful parsing, or indicates the offset
/// where a problem occurred in case an error is returned.
Error parse(DataExtractor Data, uint32_t *Offset, uint32_t EndOffset);
Error parse(DWARFDataExtractor Data, uint32_t *Offset, uint32_t EndOffset);
void dump(raw_ostream &OS, const MCRegisterInfo *MRI, bool IsEH,
unsigned IndentLevel = 1) const;

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@ -40,8 +40,8 @@ public:
virtual const DWARFSection &getLocSection() const { return Dummy; }
virtual const DWARFSection &getLoclistsSection() const { return Dummy; }
virtual StringRef getARangeSection() const { return ""; }
virtual StringRef getDebugFrameSection() const { return ""; }
virtual StringRef getEHFrameSection() const { return ""; }
virtual const DWARFSection &getDebugFrameSection() const { return Dummy; }
virtual const DWARFSection &getEHFrameSection() const { return Dummy; }
virtual const DWARFSection &getLineSection() const { return Dummy; }
virtual StringRef getLineStringSection() const { return ""; }
virtual StringRef getStringSection() const { return ""; }

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@ -629,7 +629,8 @@ public:
static void Emit(MCObjectStreamer &streamer, MCAsmBackend *MAB, bool isEH);
static void EmitAdvanceLoc(MCObjectStreamer &Streamer, uint64_t AddrDelta);
static void EncodeAdvanceLoc(MCContext &Context, uint64_t AddrDelta,
raw_ostream &OS);
raw_ostream &OS, uint32_t *Offset = nullptr,
uint32_t *Size = nullptr);
};
} // end namespace llvm

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@ -20,35 +20,38 @@ class MCExpr;
/// Extensible enumeration to represent the type of a fixup.
enum MCFixupKind {
FK_NONE = 0, ///< A no-op fixup.
FK_Data_1, ///< A one-byte fixup.
FK_Data_2, ///< A two-byte fixup.
FK_Data_4, ///< A four-byte fixup.
FK_Data_8, ///< A eight-byte fixup.
FK_PCRel_1, ///< A one-byte pc relative fixup.
FK_PCRel_2, ///< A two-byte pc relative fixup.
FK_PCRel_4, ///< A four-byte pc relative fixup.
FK_PCRel_8, ///< A eight-byte pc relative fixup.
FK_GPRel_1, ///< A one-byte gp relative fixup.
FK_GPRel_2, ///< A two-byte gp relative fixup.
FK_GPRel_4, ///< A four-byte gp relative fixup.
FK_GPRel_8, ///< A eight-byte gp relative fixup.
FK_DTPRel_4, ///< A four-byte dtp relative fixup.
FK_DTPRel_8, ///< A eight-byte dtp relative fixup.
FK_TPRel_4, ///< A four-byte tp relative fixup.
FK_TPRel_8, ///< A eight-byte tp relative fixup.
FK_SecRel_1, ///< A one-byte section relative fixup.
FK_SecRel_2, ///< A two-byte section relative fixup.
FK_SecRel_4, ///< A four-byte section relative fixup.
FK_SecRel_8, ///< A eight-byte section relative fixup.
FK_Data_Add_1, ///< A one-byte add fixup.
FK_Data_Add_2, ///< A two-byte add fixup.
FK_Data_Add_4, ///< A four-byte add fixup.
FK_Data_Add_8, ///< A eight-byte add fixup.
FK_Data_Sub_1, ///< A one-byte sub fixup.
FK_Data_Sub_2, ///< A two-byte sub fixup.
FK_Data_Sub_4, ///< A four-byte sub fixup.
FK_Data_Sub_8, ///< A eight-byte sub fixup.
FK_NONE = 0, ///< A no-op fixup.
FK_Data_1, ///< A one-byte fixup.
FK_Data_2, ///< A two-byte fixup.
FK_Data_4, ///< A four-byte fixup.
FK_Data_8, ///< A eight-byte fixup.
FK_Data_6b, ///< A six-bits fixup.
FK_PCRel_1, ///< A one-byte pc relative fixup.
FK_PCRel_2, ///< A two-byte pc relative fixup.
FK_PCRel_4, ///< A four-byte pc relative fixup.
FK_PCRel_8, ///< A eight-byte pc relative fixup.
FK_GPRel_1, ///< A one-byte gp relative fixup.
FK_GPRel_2, ///< A two-byte gp relative fixup.
FK_GPRel_4, ///< A four-byte gp relative fixup.
FK_GPRel_8, ///< A eight-byte gp relative fixup.
FK_DTPRel_4, ///< A four-byte dtp relative fixup.
FK_DTPRel_8, ///< A eight-byte dtp relative fixup.
FK_TPRel_4, ///< A four-byte tp relative fixup.
FK_TPRel_8, ///< A eight-byte tp relative fixup.
FK_SecRel_1, ///< A one-byte section relative fixup.
FK_SecRel_2, ///< A two-byte section relative fixup.
FK_SecRel_4, ///< A four-byte section relative fixup.
FK_SecRel_8, ///< A eight-byte section relative fixup.
FK_Data_Add_1, ///< A one-byte add fixup.
FK_Data_Add_2, ///< A two-byte add fixup.
FK_Data_Add_4, ///< A four-byte add fixup.
FK_Data_Add_8, ///< A eight-byte add fixup.
FK_Data_Add_6b, ///< A six-bits add fixup.
FK_Data_Sub_1, ///< A one-byte sub fixup.
FK_Data_Sub_2, ///< A two-byte sub fixup.
FK_Data_Sub_4, ///< A four-byte sub fixup.
FK_Data_Sub_8, ///< A eight-byte sub fixup.
FK_Data_Sub_6b, ///< A six-bits sub fixup.
FirstTargetFixupKind = 128,
@ -129,13 +132,37 @@ public:
/// Return the generic fixup kind for a value with the given size. It
/// is an error to pass an unsupported size.
static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) {
static MCFixupKind getKindForSize(unsigned Size, bool IsPCRel) {
switch (Size) {
default: llvm_unreachable("Invalid generic fixup size!");
case 1: return isPCRel ? FK_PCRel_1 : FK_Data_1;
case 2: return isPCRel ? FK_PCRel_2 : FK_Data_2;
case 4: return isPCRel ? FK_PCRel_4 : FK_Data_4;
case 8: return isPCRel ? FK_PCRel_8 : FK_Data_8;
case 1:
return IsPCRel ? FK_PCRel_1 : FK_Data_1;
case 2:
return IsPCRel ? FK_PCRel_2 : FK_Data_2;
case 4:
return IsPCRel ? FK_PCRel_4 : FK_Data_4;
case 8:
return IsPCRel ? FK_PCRel_8 : FK_Data_8;
}
}
/// Return the generic fixup kind for a value with the given size in bits.
/// It is an error to pass an unsupported size.
static MCFixupKind getKindForSizeInBits(unsigned Size, bool IsPCRel) {
switch (Size) {
default:
llvm_unreachable("Invalid generic fixup size!");
case 6:
assert(!IsPCRel && "Invalid pc-relative fixup size!");
return FK_Data_6b;
case 8:
return IsPCRel ? FK_PCRel_1 : FK_Data_1;
case 16:
return IsPCRel ? FK_PCRel_2 : FK_Data_2;
case 32:
return IsPCRel ? FK_PCRel_4 : FK_Data_4;
case 64:
return IsPCRel ? FK_PCRel_8 : FK_Data_8;
}
}
@ -148,6 +175,7 @@ public:
case FK_Data_2: return FK_Data_Add_2;
case FK_Data_4: return FK_Data_Add_4;
case FK_Data_8: return FK_Data_Add_8;
case FK_Data_6b: return FK_Data_Add_6b;
}
}
@ -160,6 +188,7 @@ public:
case FK_Data_2: return FK_Data_Sub_2;
case FK_Data_4: return FK_Data_Sub_4;
case FK_Data_8: return FK_Data_Sub_8;
case FK_Data_6b: return FK_Data_Sub_6b;
}
}

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@ -149,6 +149,7 @@ public:
case MCFragment::FT_CompactEncodedInst:
case MCFragment::FT_Data:
case MCFragment::FT_Dwarf:
case MCFragment::FT_DwarfFrame:
return true;
}
}
@ -232,7 +233,8 @@ public:
static bool classof(const MCFragment *F) {
MCFragment::FragmentType Kind = F->getKind();
return Kind == MCFragment::FT_Relaxable || Kind == MCFragment::FT_Data ||
Kind == MCFragment::FT_CVDefRange || Kind == MCFragment::FT_Dwarf;;
Kind == MCFragment::FT_CVDefRange || Kind == MCFragment::FT_Dwarf ||
Kind == MCFragment::FT_DwarfFrame;
}
};
@ -543,27 +545,21 @@ public:
}
};
class MCDwarfCallFrameFragment : public MCFragment {
class MCDwarfCallFrameFragment : public MCEncodedFragmentWithFixups<8, 1> {
/// AddrDelta - The expression for the difference of the two symbols that
/// make up the address delta between two .cfi_* dwarf directives.
const MCExpr *AddrDelta;
SmallString<8> Contents;
public:
MCDwarfCallFrameFragment(const MCExpr &AddrDelta, MCSection *Sec = nullptr)
: MCFragment(FT_DwarfFrame, false, Sec), AddrDelta(&AddrDelta) {
Contents.push_back(0);
}
: MCEncodedFragmentWithFixups<8, 1>(FT_DwarfFrame, false, Sec),
AddrDelta(&AddrDelta) {}
/// \name Accessors
/// @{
const MCExpr &getAddrDelta() const { return *AddrDelta; }
SmallString<8> &getContents() { return Contents; }
const SmallString<8> &getContents() const { return Contents; }
/// @}
static bool classof(const MCFragment *F) {

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@ -402,11 +402,11 @@ void DWARFContext::dump(
}
if (const auto *Off = shouldDump(Explicit, ".debug_frame", DIDT_ID_DebugFrame,
DObj->getDebugFrameSection()))
DObj->getDebugFrameSection().Data))
getDebugFrame()->dump(OS, getRegisterInfo(), *Off);
if (const auto *Off = shouldDump(Explicit, ".eh_frame", DIDT_ID_DebugFrame,
DObj->getEHFrameSection()))
DObj->getEHFrameSection().Data))
getEHFrame()->dump(OS, getRegisterInfo(), *Off);
if (DumpType & DIDT_DebugMacro) {
@ -766,7 +766,7 @@ const DWARFDebugFrame *DWARFContext::getDebugFrame() {
// provides this information). This problem is fixed in DWARFv4
// See this dwarf-discuss discussion for more details:
// http://lists.dwarfstd.org/htdig.cgi/dwarf-discuss-dwarfstd.org/2011-December/001173.html
DWARFDataExtractor debugFrameData(DObj->getDebugFrameSection(),
DWARFDataExtractor debugFrameData(*DObj, DObj->getDebugFrameSection(),
isLittleEndian(), DObj->getAddressSize());
DebugFrame.reset(new DWARFDebugFrame(getArch(), false /* IsEH */));
DebugFrame->parse(debugFrameData);
@ -777,8 +777,8 @@ const DWARFDebugFrame *DWARFContext::getEHFrame() {
if (EHFrame)
return EHFrame.get();
DWARFDataExtractor debugFrameData(DObj->getEHFrameSection(), isLittleEndian(),
DObj->getAddressSize());
DWARFDataExtractor debugFrameData(*DObj, DObj->getEHFrameSection(),
isLittleEndian(), DObj->getAddressSize());
DebugFrame.reset(new DWARFDebugFrame(getArch(), true /* IsEH */));
DebugFrame->parse(debugFrameData);
return DebugFrame.get();
@ -1385,6 +1385,8 @@ class DWARFObjInMemory final : public DWARFObject {
DWARFSectionMap RnglistsSection;
DWARFSectionMap StringOffsetSection;
DWARFSectionMap LineDWOSection;
DWARFSectionMap DebugFrameSection;
DWARFSectionMap EHFrameSection;
DWARFSectionMap LocDWOSection;
DWARFSectionMap StringOffsetDWOSection;
DWARFSectionMap RangeDWOSection;
@ -1405,6 +1407,8 @@ class DWARFObjInMemory final : public DWARFObject {
.Case("debug_loc", &LocSection)
.Case("debug_loclists", &LocListsSection)
.Case("debug_line", &LineSection)
.Case("debug_frame", &DebugFrameSection)
.Case("eh_frame", &EHFrameSection)
.Case("debug_str_offsets", &StringOffsetSection)
.Case("debug_ranges", &RangeSection)
.Case("debug_rnglists", &RnglistsSection)
@ -1428,8 +1432,6 @@ class DWARFObjInMemory final : public DWARFObject {
StringRef AbbrevSection;
StringRef ARangeSection;
StringRef DebugFrameSection;
StringRef EHFrameSection;
StringRef StringSection;
StringRef MacinfoSection;
StringRef AbbrevDWOSection;
@ -1449,8 +1451,6 @@ class DWARFObjInMemory final : public DWARFObject {
return StringSwitch<StringRef *>(Name)
.Case("debug_abbrev", &AbbrevSection)
.Case("debug_aranges", &ARangeSection)
.Case("debug_frame", &DebugFrameSection)
.Case("eh_frame", &EHFrameSection)
.Case("debug_str", &StringSection)
.Case("debug_macinfo", &MacinfoSection)
.Case("debug_abbrev.dwo", &AbbrevDWOSection)
@ -1747,8 +1747,12 @@ public:
const DWARFSection &getLocSection() const override { return LocSection; }
const DWARFSection &getLoclistsSection() const override { return LocListsSection; }
StringRef getARangeSection() const override { return ARangeSection; }
StringRef getDebugFrameSection() const override { return DebugFrameSection; }
StringRef getEHFrameSection() const override { return EHFrameSection; }
const DWARFSection &getDebugFrameSection() const override {
return DebugFrameSection;
}
const DWARFSection &getEHFrameSection() const override {
return EHFrameSection;
}
const DWARFSection &getLineSection() const override { return LineSection; }
StringRef getStringSection() const override { return StringSection; }
const DWARFSection &getRangeSection() const override { return RangeSection; }

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@ -34,10 +34,10 @@ using namespace dwarf;
const uint8_t DWARF_CFI_PRIMARY_OPCODE_MASK = 0xc0;
const uint8_t DWARF_CFI_PRIMARY_OPERAND_MASK = 0x3f;
Error CFIProgram::parse(DataExtractor Data, uint32_t *Offset,
Error CFIProgram::parse(DWARFDataExtractor Data, uint32_t *Offset,
uint32_t EndOffset) {
while (*Offset < EndOffset) {
uint8_t Opcode = Data.getU8(Offset);
uint8_t Opcode = Data.getRelocatedValue(1, Offset);
// Some instructions have a primary opcode encoded in the top bits.
uint8_t Primary = Opcode & DWARF_CFI_PRIMARY_OPCODE_MASK;
@ -74,19 +74,19 @@ Error CFIProgram::parse(DataExtractor Data, uint32_t *Offset,
break;
case DW_CFA_set_loc:
// Operands: Address
addInstruction(Opcode, Data.getAddress(Offset));
addInstruction(Opcode, Data.getRelocatedAddress(Offset));
break;
case DW_CFA_advance_loc1:
// Operands: 1-byte delta
addInstruction(Opcode, Data.getU8(Offset));
addInstruction(Opcode, Data.getRelocatedValue(1, Offset));
break;
case DW_CFA_advance_loc2:
// Operands: 2-byte delta
addInstruction(Opcode, Data.getU16(Offset));
addInstruction(Opcode, Data.getRelocatedValue(2, Offset));
break;
case DW_CFA_advance_loc4:
// Operands: 4-byte delta
addInstruction(Opcode, Data.getU32(Offset));
addInstruction(Opcode, Data.getRelocatedValue(4, Offset));
break;
case DW_CFA_restore_extended:
case DW_CFA_undefined:
@ -361,7 +361,7 @@ void DWARFDebugFrame::parse(DWARFDataExtractor Data) {
uint32_t StartOffset = Offset;
bool IsDWARF64 = false;
uint64_t Length = Data.getU32(&Offset);
uint64_t Length = Data.getRelocatedValue(4, &Offset);
uint64_t Id;
if (Length == UINT32_MAX) {
@ -369,7 +369,7 @@ void DWARFDebugFrame::parse(DWARFDataExtractor Data) {
// field being 0xffffffff. Then, the next 64 bits are the actual entry
// length.
IsDWARF64 = true;
Length = Data.getU64(&Offset);
Length = Data.getRelocatedValue(8, &Offset);
}
// At this point, Offset points to the next field after Length.
@ -512,8 +512,8 @@ void DWARFDebugFrame::parse(DWARFDataExtractor Data) {
ReportError(StartOffset, "Parsing augmentation data at %lx failed");
}
} else {
InitialLocation = Data.getAddress(&Offset);
AddressRange = Data.getAddress(&Offset);
InitialLocation = Data.getRelocatedAddress(&Offset);
AddressRange = Data.getRelocatedAddress(&Offset);
}
Entries.emplace_back(new FDE(StartOffset, Length, CIEPointer,

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@ -73,6 +73,7 @@ const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"FK_Data_2", 0, 16, 0},
{"FK_Data_4", 0, 32, 0},
{"FK_Data_8", 0, 64, 0},
{"FK_Data_6b", 0, 6, 0},
{"FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel},
{"FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel},
{"FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
@ -93,10 +94,12 @@ const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
{"FK_Data_Add_2", 0, 16, 0},
{"FK_Data_Add_4", 0, 32, 0},
{"FK_Data_Add_8", 0, 64, 0},
{"FK_Data_Add_6b", 0, 6, 0},
{"FK_Data_Sub_1", 0, 8, 0},
{"FK_Data_Sub_2", 0, 16, 0},
{"FK_Data_Sub_4", 0, 32, 0},
{"FK_Data_Sub_8", 0, 64, 0}};
{"FK_Data_Sub_8", 0, 64, 0},
{"FK_Data_Sub_6b", 0, 6, 0}};
assert((size_t)Kind <= array_lengthof(Builtins) && "Unknown fixup kind");
return Builtins[Kind];

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@ -840,6 +840,10 @@ void MCAssembler::layout(MCAsmLayout &Layout) {
getBackend().shouldInsertFixupForCodeAlign(*this, Layout, *AF);
}
continue;
} else if (auto *FragWithFixups =
dyn_cast<MCDwarfCallFrameFragment>(&Frag)) {
Fixups = FragWithFixups->getFixups();
Contents = FragWithFixups->getContents();
} else
llvm_unreachable("Unknown fragment with fixups!");
for (const MCFixup &Fixup : Fixups) {
@ -969,13 +973,9 @@ bool MCAssembler::relaxDwarfLineAddr(MCAsmLayout &Layout,
MCContext &Context = Layout.getAssembler().getContext();
uint64_t OldSize = DF.getContents().size();
int64_t AddrDelta;
bool Abs;
if (getBackend().requiresDiffExpressionRelocations())
Abs = DF.getAddrDelta().evaluateAsAbsolute(AddrDelta, Layout);
else {
Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout);
assert(Abs && "We created a line delta with an invalid expression");
}
bool Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout);
assert(Abs && "We created a line delta with an invalid expression");
(void)Abs;
int64_t LineDelta;
LineDelta = DF.getLineDelta();
SmallVectorImpl<char> &Data = DF.getContents();
@ -983,7 +983,7 @@ bool MCAssembler::relaxDwarfLineAddr(MCAsmLayout &Layout,
raw_svector_ostream OSE(Data);
DF.getFixups().clear();
if (Abs) {
if (!getBackend().requiresDiffExpressionRelocations()) {
MCDwarfLineAddr::Encode(Context, getDWARFLinetableParams(), LineDelta,
AddrDelta, OSE);
} else {
@ -1017,10 +1017,25 @@ bool MCAssembler::relaxDwarfCallFrameFragment(MCAsmLayout &Layout,
bool Abs = DF.getAddrDelta().evaluateKnownAbsolute(AddrDelta, Layout);
assert(Abs && "We created call frame with an invalid expression");
(void) Abs;
SmallString<8> &Data = DF.getContents();
SmallVectorImpl<char> &Data = DF.getContents();
Data.clear();
raw_svector_ostream OSE(Data);
MCDwarfFrameEmitter::EncodeAdvanceLoc(Context, AddrDelta, OSE);
DF.getFixups().clear();
if (getBackend().requiresDiffExpressionRelocations()) {
uint32_t Offset;
uint32_t Size;
MCDwarfFrameEmitter::EncodeAdvanceLoc(Context, AddrDelta, OSE, &Offset,
&Size);
if (Size) {
DF.getFixups().push_back(MCFixup::create(
Offset, &DF.getAddrDelta(),
MCFixup::getKindForSizeInBits(Size /*In bits.*/, false /*isPCRel*/)));
}
} else {
MCDwarfFrameEmitter::EncodeAdvanceLoc(Context, AddrDelta, OSE);
}
return OldSize != Data.size();
}

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@ -1897,26 +1897,54 @@ void MCDwarfFrameEmitter::EmitAdvanceLoc(MCObjectStreamer &Streamer,
}
void MCDwarfFrameEmitter::EncodeAdvanceLoc(MCContext &Context,
uint64_t AddrDelta,
raw_ostream &OS) {
uint64_t AddrDelta, raw_ostream &OS,
uint32_t *Offset, uint32_t *Size) {
// Scale the address delta by the minimum instruction length.
AddrDelta = ScaleAddrDelta(Context, AddrDelta);
bool WithFixups = false;
if (Offset && Size)
WithFixups = true;
support::endianness E =
Context.getAsmInfo()->isLittleEndian() ? support::little : support::big;
if (AddrDelta == 0) {
if (WithFixups) {
*Offset = 0;
*Size = 0;
}
} else if (isUIntN(6, AddrDelta)) {
uint8_t Opcode = dwarf::DW_CFA_advance_loc | AddrDelta;
OS << Opcode;
if (WithFixups) {
*Offset = OS.tell();
*Size = 6;
OS << uint8_t(dwarf::DW_CFA_advance_loc);
} else
OS << Opcode;
} else if (isUInt<8>(AddrDelta)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc1);
OS << uint8_t(AddrDelta);
if (WithFixups) {
*Offset = OS.tell();
*Size = 8;
OS.write_zeros(1);
} else
OS << uint8_t(AddrDelta);
} else if (isUInt<16>(AddrDelta)) {
OS << uint8_t(dwarf::DW_CFA_advance_loc2);
support::endian::write<uint16_t>(OS, AddrDelta, E);
if (WithFixups) {
*Offset = OS.tell();
*Size = 16;
OS.write_zeros(2);
} else
support::endian::write<uint16_t>(OS, AddrDelta, E);
} else {
assert(isUInt<32>(AddrDelta));
OS << uint8_t(dwarf::DW_CFA_advance_loc4);
support::endian::write<uint32_t>(OS, AddrDelta, E);
if (WithFixups) {
*Offset = OS.tell();
*Size = 32;
OS.write_zeros(4);
} else
support::endian::write<uint32_t>(OS, AddrDelta, E);
}
}

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@ -335,6 +335,8 @@ static bool supportsRISCV(uint64_t Type) {
case ELF::R_RISCV_NONE:
case ELF::R_RISCV_32:
case ELF::R_RISCV_64:
case ELF::R_RISCV_SET6:
case ELF::R_RISCV_SUB6:
case ELF::R_RISCV_ADD8:
case ELF::R_RISCV_SUB8:
case ELF::R_RISCV_ADD16:
@ -358,6 +360,10 @@ static uint64_t resolveRISCV(RelocationRef R, uint64_t S, uint64_t A) {
return (S + RA) & 0xFFFFFFFF;
case ELF::R_RISCV_64:
return S + RA;
case ELF::R_RISCV_SET6:
return (A + (S + RA)) & 0xFF;
case ELF::R_RISCV_SUB6:
return (A - (S + RA)) & 0xFF;
case ELF::R_RISCV_ADD8:
return (A + (S + RA)) & 0xFF;
case ELF::R_RISCV_SUB8:

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@ -186,6 +186,7 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
case FK_Data_2:
case FK_Data_4:
case FK_Data_8:
case FK_Data_6b:
return Value;
case RISCV::fixup_riscv_lo12_i:
case RISCV::fixup_riscv_pcrel_lo12_i:

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@ -98,6 +98,8 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_RISCV_ADD32;
case FK_Data_Add_8:
return ELF::R_RISCV_ADD64;
case FK_Data_Add_6b:
return ELF::R_RISCV_SET6;
case FK_Data_Sub_1:
return ELF::R_RISCV_SUB8;
case FK_Data_Sub_2:
@ -106,6 +108,8 @@ unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
return ELF::R_RISCV_SUB32;
case FK_Data_Sub_8:
return ELF::R_RISCV_SUB64;
case FK_Data_Sub_6b:
return ELF::R_RISCV_SUB6;
case RISCV::fixup_riscv_hi20:
return ELF::R_RISCV_HI20;
case RISCV::fixup_riscv_lo12_i:

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@ -14,7 +14,7 @@ entry:
store i32 0, i32* %retval, align 4
; RELAX: R_RISCV_ADD64 b
; RELAX: R_RISCV_SUB64 a
; NORELAX-NOT: R_RISCV
; NORELAX-NOT: R_RISCV_ADD
call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
ret i32 0
}

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@ -6,14 +6,14 @@
; Check that we actually have relocations, otherwise this is kind of pointless.
; READOBJ-RELOCS: Section (8) .rela.debug_info {
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_ADD32 - 0x0
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_SUB32 - 0x0
; READOBJ-RELOCS: Section (11) .rela.debug_addr {
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_ADD32 - 0x0
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_SUB32 - 0x0
; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 - 0x0
; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 - 0x0
; READOBJ-RELOCS: Section (15) .rela.debug_frame {
; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 - 0x0
; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 - 0x0
; READOBJ-RELOCS: Section (17) .rela.debug_line {
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_ADD32 - 0xFFFFFFFC
; READOBJ-RELOCS-NEXT: 0x0 R_RISCV_SUB32 .Lline_table_start0 0x0
; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 - 0x0
; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 - 0x0
; Check that we can print the source, even with relocations.
; OBJDUMP-SOURCE: Disassembly of section .text:

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@ -0,0 +1,59 @@
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - \
; RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX %s
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o - \
; RUN: | llvm-dwarfdump --debug-frame - \
; RUN: | FileCheck -check-prefix=RELAX-DWARFDUMP %s
;
; RELAX: Section{{.*}}.rela.{{eh|debug}}_frame {
; RELAX-NOT: {{[}]}}
; RELAX: 0x20 R_RISCV_ADD32
; RELAX: 0x20 R_RISCV_SUB32
; RELAX-NOT: {{[}]}}
; RELAX: 0x25 R_RISCV_SET6
; RELAX: 0x25 R_RISCV_SUB6
;
; RELAX-DWARFDUMP: CIE
; RELAX-DWARFDUMP: DW_CFA_advance_loc
; RELAX-DWARFDUMP: DW_CFA_def_cfa_offset
; RELAX-DWARFDUMP: DW_CFA_offset
; RELAX-DWARFDUMP: DW_CFA_restore
source_filename = "frame.c"
; Function Attrs: noinline nounwind optnone
define i32 @init() {
entry:
ret i32 0
}
; Function Attrs: noinline nounwind optnone
define i32 @foo(i32 signext %value) {
entry:
%value.addr = alloca i32, align 4
store i32 %value, i32* %value.addr, align 4
%0 = load i32, i32* %value.addr, align 4
ret i32 %0
}
; Function Attrs: noinline nounwind optnone
define i32 @bar() {
entry:
%result = alloca i32, align 4
%v = alloca i32, align 4
%call = call i32 @init()
store i32 %call, i32* %v, align 4
%0 = load i32, i32* %v, align 4
%call1 = call i32 @foo(i32 signext %0)
store i32 %call1, i32* %result, align 4
%1 = load i32, i32* %result, align 4
ret i32 %1
}
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5}
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
!1 = !DIFile(filename: "line.c", directory: "./")
!2 = !{}
!3 = !{i32 2, !"Dwarf Version", i32 4}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = !{i32 1, !"wchar_size", i32 4}

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@ -14,12 +14,9 @@ func:
# preparation for follow-on patches to fix it.
# RELAX-RELOC: Section (4) .rela.eh_frame {
# RELAX-RELOC-NEXT: 0x0 R_RISCV_ADD32 - 0xFFFFFFFC
# RELAX-RELOC-NEXT: 0x0 R_RISCV_SUB32 - 0x0
# RELAX-RELOC-NEXT: 0x14 R_RISCV_ADD32 - 0x0
# RELAX-RELOC-NEXT: 0x14 R_RISCV_SUB32 - 0x0
# RELAX-RELOC-NEXT: 0x18 R_RISCV_ADD32 - 0x0
# RELAX-RELOC-NEXT: 0x18 R_RISCV_SUB32 - 0x0
# RELAX-RELOC-NEXT: 0x0 R_RISCV_32 - 0x10
# RELAX-RELOC-NEXT: 0x14 R_RISCV_32 - 0x10
# RELAX-RELOC-NEXT: 0x18 R_RISCV_32 - 0x18
# RELAX-RELOC-NEXT: 0x1C R_RISCV_ADD32 - 0x0
# RELAX-RELOC-NEXT: 0x1C R_RISCV_SUB32 - 0x0
# RELAX-RELOC-NEXT: 0x20 R_RISCV_ADD32 - 0x0

View File

@ -2003,7 +2003,7 @@ void DwarfLinker::patchFrameInfoForObject(const DebugMapObject &DMO,
RangesTy &Ranges,
DWARFContext &OrigDwarf,
unsigned AddrSize) {
StringRef FrameData = OrigDwarf.getDWARFObj().getDebugFrameSection();
StringRef FrameData = OrigDwarf.getDWARFObj().getDebugFrameSection().Data;
if (FrameData.empty())
return;