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[AsmPrinterDwarf] Add support for .cfi_restore directive
As of today we only use .cfi_offset to specify the offset of a CSR, but we never use .cfi_restore when the CSR is restored. If we want to perform a more advanced type of shrink-wrapping, we need to use .cfi_restore in order to switch the CFI state between blocks. This patch only aims at adding support for the directive. Differential Revision: https://reviews.llvm.org/D36114 llvm-svn: 317199
This commit is contained in:
Francis Visoiu Mistrih
parent
cbdc3e3d67
commit
94c00d2e59
@ -219,6 +219,9 @@ void AsmPrinter::emitCFIInstruction(const MCCFIInstruction &Inst) const {
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case MCCFIInstruction::OpEscape:
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OutStreamer->EmitCFIEscape(Inst.getValues());
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break;
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case MCCFIInstruction::OpRestore:
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OutStreamer->EmitCFIRestore(Inst.getRegister());
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break;
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}
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}
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@ -216,6 +216,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) {
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.Case("def_cfa_register", MIToken::kw_cfi_def_cfa_register)
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.Case("def_cfa_offset", MIToken::kw_cfi_def_cfa_offset)
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.Case("def_cfa", MIToken::kw_cfi_def_cfa)
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.Case("restore", MIToken::kw_cfi_restore)
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.Case("blockaddress", MIToken::kw_blockaddress)
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.Case("intrinsic", MIToken::kw_intrinsic)
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.Case("target-index", MIToken::kw_target_index)
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@ -68,6 +68,7 @@ struct MIToken {
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kw_cfi_def_cfa_register,
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kw_cfi_def_cfa_offset,
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kw_cfi_def_cfa,
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kw_cfi_restore,
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kw_blockaddress,
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kw_intrinsic,
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kw_target_index,
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@ -1634,6 +1634,12 @@ bool MIParser::parseCFIOperand(MachineOperand &Dest) {
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CFIIndex =
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MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
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break;
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case MIToken::kw_cfi_restore:
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if (parseCFIRegister(Reg))
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return true;
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CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
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break;
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default:
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// TODO: Parse the other CFI operands.
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llvm_unreachable("The current token should be a cfi operand");
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@ -1912,6 +1918,7 @@ bool MIParser::parseMachineOperand(MachineOperand &Dest,
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case MIToken::kw_cfi_def_cfa_register:
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case MIToken::kw_cfi_def_cfa_offset:
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case MIToken::kw_cfi_def_cfa:
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case MIToken::kw_cfi_restore:
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return parseCFIOperand(Dest);
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case MIToken::kw_blockaddress:
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return parseBlockAddressOperand(Dest);
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@ -1243,6 +1243,12 @@ void MIPrinter::print(const MCCFIInstruction &CFI,
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printCFIRegister(CFI.getRegister(), OS, TRI);
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OS << ", " << CFI.getOffset();
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break;
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case MCCFIInstruction::OpRestore:
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OS << "restore ";
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if (CFI.getLabel())
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OS << "<mcsymbol> ";
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printCFIRegister(CFI.getRegister(), OS, TRI);
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break;
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default:
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// TODO: Print the other CFI Operations.
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OS << "<unserializable cfi operation>";
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@ -260,6 +260,7 @@ public:
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void EmitCFILsda(const MCSymbol *Sym, unsigned Encoding) override;
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void EmitCFIRememberState() override;
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void EmitCFIRestoreState() override;
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void EmitCFIRestore(int64_t Register) override;
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void EmitCFISameValue(int64_t Register) override;
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void EmitCFIRelOffset(int64_t Register, int64_t Offset) override;
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void EmitCFIAdjustCfaOffset(int64_t Adjustment) override;
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@ -1385,6 +1386,13 @@ void MCAsmStreamer::EmitCFIRestoreState() {
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EmitEOL();
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}
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void MCAsmStreamer::EmitCFIRestore(int64_t Register) {
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MCStreamer::EmitCFIRestore(Register);
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OS << "\t.cfi_restore ";
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EmitRegisterName(Register);
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EmitEOL();
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}
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void MCAsmStreamer::EmitCFISameValue(int64_t Register) {
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MCStreamer::EmitCFISameValue(Register);
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OS << "\t.cfi_same_value ";
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37
test/CodeGen/AArch64/cfi_restore.mir
Normal file
37
test/CodeGen/AArch64/cfi_restore.mir
Normal file
@ -0,0 +1,37 @@
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# RUN: llc -mtriple=aarch64-- -start-after prologepilog -o - %s | FileCheck %s
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---
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name: fun
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# CHECK: .cfi_startproc
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tracksRegLiveness: true
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frameInfo:
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stackSize: 16
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maxAlignment: 8
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hasCalls: true
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stack:
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- { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
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callee-saved-register: '%lr' }
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- { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
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callee-saved-register: '%fp' }
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body: |
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bb.0:
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liveins: %fp, %lr
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%sp = frame-setup SUBXri %sp, 16, 0
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frame-setup STRXui killed %fp, %sp, 0 :: (store 8 into %stack.1)
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frame-setup CFI_INSTRUCTION offset %w29, -16
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; CHECK: .cfi_offset w29, -16
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frame-setup STRXui killed %lr, %sp, 1 :: (store 8 into %stack.0)
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frame-setup CFI_INSTRUCTION offset %w30, -8
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; CHECK: .cfi_offset w30, -8
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%fp = frame-setup ADDXri %sp, 0, 0
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frame-setup CFI_INSTRUCTION def_cfa %w29, 16
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%lr = LDRXui %sp, 1 :: (load 8 from %stack.0)
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CFI_INSTRUCTION restore %w30
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; CHECK: .cfi_restore w30
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%fp = LDRXui %sp, 0 :: (load 8 from %stack.1)
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CFI_INSTRUCTION restore %w29
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; CHECK: .cfi_restore w29
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%sp = ADDXri %sp, 16, 0
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RET_ReallyLR
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; CHECK: .cfi_endproc
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...
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@ -1,31 +0,0 @@
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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the def_cfa operands
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# correctly.
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--- |
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declare void @foo()
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define void @trivial_fp_func() {
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entry:
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call void @foo()
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ret void
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}
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...
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---
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name: trivial_fp_func
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body: |
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bb.0.entry:
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liveins: %lr, %fp, %lr, %fp
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%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
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%fp = frame-setup ADDXri %sp, 0, 0
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; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
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frame-setup CFI_INSTRUCTION def_cfa %w29, 16
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frame-setup CFI_INSTRUCTION offset %w30, -8
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frame-setup CFI_INSTRUCTION offset %w29, -16
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BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
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%sp, %fp, %lr = LDPXpost %sp, 2
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RET_ReallyLR
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...
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59
test/CodeGen/MIR/AArch64/cfi.mir
Normal file
59
test/CodeGen/MIR/AArch64/cfi.mir
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@ -0,0 +1,59 @@
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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the cfi directives correctly.
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--- |
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declare void @foo()
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define void @trivial_fp_func() {
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entry:
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call void @foo()
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ret void
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}
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define void @trivial_fp_func_restore() {
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entry:
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call void @foo()
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ret void
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}
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...
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---
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name: trivial_fp_func
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# CHECK-LABEL: name: trivial_fp_func
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body: |
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bb.0.entry:
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liveins: %lr, %fp, %lr, %fp
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%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
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%fp = frame-setup ADDXri %sp, 0, 0
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; CHECK: CFI_INSTRUCTION def_cfa %w29, 16
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frame-setup CFI_INSTRUCTION def_cfa %w29, 16
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frame-setup CFI_INSTRUCTION offset %w30, -8
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frame-setup CFI_INSTRUCTION offset %w29, -16
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BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
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%sp, %fp, %lr = LDPXpost %sp, 2
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RET_ReallyLR
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...
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---
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name: trivial_fp_func_restore
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# CHECK-LABEL: name: trivial_fp_func_restore
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body: |
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bb.0.entry:
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liveins: %lr, %fp
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%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2
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%fp = frame-setup ADDXri %sp, 0, 0
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frame-setup CFI_INSTRUCTION def_cfa %w29, 16
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frame-setup CFI_INSTRUCTION offset %w30, -8
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; CHECK: CFI_INSTRUCTION offset %w30, -8
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frame-setup CFI_INSTRUCTION offset %w29, -16
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; CHECK: CFI_INSTRUCTION offset %w29, -16
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BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp
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%sp, %fp, %lr = LDPXpost %sp, 2
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CFI_INSTRUCTION restore %w30
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; CHECK: CFI_INSTRUCTION restore %w30
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CFI_INSTRUCTION restore %w29
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; CHECK: CFI_INSTRUCTION restore %w29
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RET_ReallyLR
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...
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26
test/MC/AArch64/cfi.s
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26
test/MC/AArch64/cfi.s
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@ -0,0 +1,26 @@
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// RUN: llvm-mc -triple aarch64-- -o - %s | FileCheck %s
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fun:
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.cfi_startproc
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// CHECK: .cfi_startproc
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stp x29, x30, [sp, #-16]!
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.Lcfi0:
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.cfi_offset w29, -16
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// CHECK: .cfi_offset w29, -16
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.Lcfi1:
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.cfi_offset w30, -8
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// CHECK: .cfi_offset w30, -8
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mov x29, sp
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.Lcfi2:
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.cfi_def_cfa w29, 16
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// CHECK: .cfi_def_cfa w29, 16
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.Lcfi3:
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.cfi_restore w30
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// CHECK: .cfi_restore w30
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ldr x29, [sp], #16
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.Lcfi4:
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.cfi_restore w29
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// CHECK: .cfi_restore w29
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ret
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.cfi_endproc
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// CHECK: .cfi_endproc
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