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Fix the A9 machine model. VTRN writes two registers.

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llvm-svn: 196514
This commit is contained in:
Andrew Trick 2013-12-05 17:55:49 +00:00
parent 6bd4b82476
commit 9518dde658
1 changed files with 1 additions and 1 deletions
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2
lib/Target/ARM/ARMScheduleA9.td
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@ -2431,7 +2431,7 @@ def :ItinRW<[A9WriteV3], [IIC_VSHLiD, IIC_VSHLiQ]>;
def :ItinRW<[A9WriteV4], [IIC_VSHLi4D, IIC_VSHLi4Q]>;
// NEON permute
def :ItinRW<[A9WriteV2], [IIC_VPERMD, IIC_VPERMQ, IIC_VEXTD]>;
def :ItinRW<[A9WriteV2, A9WriteV2], [IIC_VPERMD, IIC_VPERMQ, IIC_VEXTD]>;
def :ItinRW<[A9WriteV3, A9WriteV4, ReadDefault, A9Read2],
[IIC_VPERMQ3, IIC_VEXTQ]>;
def :ItinRW<[A9WriteV3, A9Read2], [IIC_VTB1]>;