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R600: Add support for i8 and i16 local memory loads
llvm-svn: 189225
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@ -96,6 +96,10 @@ def az_extloadi8 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
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return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i8;
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}]>;
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def az_extloadi8_global : PatFrag<(ops node:$ptr), (az_extloadi8 node:$ptr), [{
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return isGlobalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def sextloadi8_global : PatFrag<(ops node:$ptr), (sextloadi8 node:$ptr), [{
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return isGlobalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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@ -108,8 +112,12 @@ def sextloadi8_constant : PatFrag<(ops node:$ptr), (sextloadi8 node:$ptr), [{
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return isConstantLoad(dyn_cast<LoadSDNode>(N), -1);
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}]>;
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def az_extloadi8_global : PatFrag<(ops node:$ptr), (az_extloadi8 node:$ptr), [{
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return isGlobalLoad(dyn_cast<LoadSDNode>(N));
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def az_extloadi8_local : PatFrag<(ops node:$ptr), (az_extloadi8 node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def sextloadi8_local : PatFrag<(ops node:$ptr), (sextloadi8 node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def az_extloadi16 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
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@ -132,6 +140,14 @@ def sextloadi16_constant : PatFrag<(ops node:$ptr), (sextloadi16 node:$ptr), [{
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return isConstantLoad(dyn_cast<LoadSDNode>(N), -1);
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}]>;
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def az_extloadi16_local : PatFrag<(ops node:$ptr), (az_extloadi16 node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def sextloadi16_local : PatFrag<(ops node:$ptr), (sextloadi16 node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def az_extloadi32 : PatFrag<(ops node:$ptr), (az_extload node:$ptr), [{
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return cast<LoadSDNode>(N)->getMemoryVT() == MVT::i32;
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}]>;
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@ -104,7 +104,21 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
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static_cast<const R600InstrInfo*>(MF->getTarget().getInstrInfo());
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switch (MI->getOpcode()) {
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default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
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default:
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if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::LDS_1A) {
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MachineInstrBuilder NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
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TII->get(MI->getOpcode()),
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AMDGPU::OQAP);
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for (unsigned i = 1, e = MI->getNumOperands(); i < e; ++i) {
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NewMI.addOperand(MI->getOperand(i));
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}
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TII->buildDefaultInstruction(*BB, I, AMDGPU::MOV,
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MI->getOperand(0).getReg(),
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AMDGPU::OQAP);
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} else {
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return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
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}
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break;
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case AMDGPU::CLAMP_R600: {
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MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, I,
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AMDGPU::MOV,
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@ -140,19 +154,6 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
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break;
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}
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case AMDGPU::LDS_READ_RET: {
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MachineInstrBuilder NewMI = BuildMI(*BB, I, BB->findDebugLoc(I),
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TII->get(MI->getOpcode()),
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AMDGPU::OQAP);
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for (unsigned i = 1, e = MI->getNumOperands(); i < e; ++i) {
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NewMI.addOperand(MI->getOperand(i));
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}
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TII->buildDefaultInstruction(*BB, I, AMDGPU::MOV,
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MI->getOperand(0).getReg(),
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AMDGPU::OQAP);
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break;
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}
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case AMDGPU::MOV_IMM_F32:
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TII->buildMovImm(*BB, I, MI->getOperand(0).getReg(),
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MI->getOperand(1).getFPImm()->getValueAPF()
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@ -1682,6 +1682,18 @@ def LDS_SHORT_WRITE : R600_LDS_1A1D<0x13, "LDS_SHORT_WRITE",
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def LDS_READ_RET : R600_LDS_1A <0x32, "LDS_READ_RET",
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[(set (i32 R600_Reg32:$dst), (local_load R600_Reg32:$src0))]
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>;
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def LDS_BYTE_READ_RET : R600_LDS_1A <0x36, "LDS_BYTE_READ_RET",
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[(set i32:$dst, (sextloadi8_local i32:$src0))]
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>;
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def LDS_UBYTE_READ_RET : R600_LDS_1A <0x37, "LDS_UBYTE_READ_RET",
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[(set i32:$dst, (az_extloadi8_local i32:$src0))]
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>;
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def LDS_SHORT_READ_RET : R600_LDS_1A <0x38, "LDS_SHORT_READ_RET",
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[(set i32:$dst, (sextloadi16_local i32:$src0))]
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>;
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def LDS_USHORT_READ_RET : R600_LDS_1A <0x39, "LDS_USHORT_READ_RET",
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[(set i32:$dst, (az_extloadi16_local i32:$src0))]
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>;
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// TRUNC is used for the FLT_TO_INT instructions to work around a
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// perceived problem where the rounding modes are applied differently
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@ -395,6 +395,10 @@ def DS_WRITE_B32 : DS_Store_Helper <0x0000000d, "DS_WRITE_B32", VReg_32>;
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def DS_WRITE_B8 : DS_Store_Helper <0x00000001e, "DS_WRITE_B8", VReg_32>;
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def DS_WRITE_B16 : DS_Store_Helper <0x00000001f, "DS_WRITE_B16", VReg_32>;
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def DS_READ_B32 : DS_Load_Helper <0x00000036, "DS_READ_B32", VReg_32>;
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def DS_READ_I8 : DS_Load_Helper <0x00000039, "DS_READ_I8", VReg_32>;
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def DS_READ_U8 : DS_Load_Helper <0x0000003a, "DS_READ_U8", VReg_32>;
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def DS_READ_I16 : DS_Load_Helper <0x0000003b, "DS_READ_I16", VReg_32>;
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def DS_READ_U16 : DS_Load_Helper <0x0000003c, "DS_READ_U16", VReg_32>;
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//def BUFFER_LOAD_FORMAT_X : MUBUF_ <0x00000000, "BUFFER_LOAD_FORMAT_X", []>;
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//def BUFFER_LOAD_FORMAT_XY : MUBUF_ <0x00000001, "BUFFER_LOAD_FORMAT_XY", []>;
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@ -1747,6 +1751,16 @@ def : Pat <
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/********** Load/Store Patterns **********/
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/********** ======================= **********/
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class DSReadPat <DS inst, ValueType vt, PatFrag frag> : Pat <
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(frag i32:$src0),
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(vt (inst 0, $src0, $src0, $src0, 0, 0))
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>;
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def : DSReadPat <DS_READ_I8, i32, sextloadi8_local>;
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def : DSReadPat <DS_READ_U8, i32, az_extloadi8_local>;
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def : DSReadPat <DS_READ_I16, i32, sextloadi16_local>;
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def : DSReadPat <DS_READ_U16, i32, az_extloadi16_local>;
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def : DSReadPat <DS_READ_B32, i32, local_load>;
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def : Pat <
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(local_load i32:$src0),
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(i32 (DS_READ_B32 0, $src0, $src0, $src0, 0, 0))
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@ -438,3 +438,81 @@ define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(
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ret void
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}
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;===------------------------------------------------------------------------===;
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; LOCAL ADDRESS SPACE
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;===------------------------------------------------------------------------===;
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; Load an i8 value from the local address space.
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; R600-CHECK: @load_i8_local
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; R600-CHECK: LDS_UBYTE_READ_RET
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; SI-CHECK: @load_i8_local
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; SI-CHECK: DS_READ_U8
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define void @load_i8_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
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%1 = load i8 addrspace(3)* %in
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%2 = zext i8 %1 to i32
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store i32 %2, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @load_i8_sext_local
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; R600-CHECK: LDS_UBYTE_READ_RET
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; R600-CHECK: ASHR
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; SI-CHECK: @load_i8_sext_local
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; SI-CHECK: DS_READ_I8
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define void @load_i8_sext_local(i32 addrspace(1)* %out, i8 addrspace(3)* %in) {
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entry:
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%0 = load i8 addrspace(3)* %in
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%1 = sext i8 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; Load an i16 value from the local address space.
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; R600-CHECK: @load_i16_local
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; R600-CHECK: LDS_USHORT_READ_RET
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; SI-CHECK: @load_i16_local
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; SI-CHECK: DS_READ_U16
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define void @load_i16_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
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entry:
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%0 = load i16 addrspace(3)* %in
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%1 = zext i16 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; R600-CHECK: @load_i16_sext_local
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; R600-CHECK: LDS_USHORT_READ_RET
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; R600-CHECK: ASHR
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; SI-CHECK: @load_i16_sext_local
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; SI-CHECK: DS_READ_I16
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define void @load_i16_sext_local(i32 addrspace(1)* %out, i16 addrspace(3)* %in) {
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entry:
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%0 = load i16 addrspace(3)* %in
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%1 = sext i16 %0 to i32
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; load an i32 value from the glocal address space.
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; R600-CHECK: @load_i32_local
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; R600-CHECK: LDS_READ_RET
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; SI-CHECK: @load_i32_local
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; SI-CHECK: DS_READ_B32
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define void @load_i32_local(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = load i32 addrspace(3)* %in
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; load a f32 value from the global address space.
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; R600-CHECK: @load_f32_local
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; R600-CHECK: LDS_READ_RET
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; SI-CHECK: @load_f32_local
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; SI-CHECK: DS_READ_B32
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define void @load_f32_local(float addrspace(1)* %out, float addrspace(3)* %in) {
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entry:
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%0 = load float addrspace(3)* %in
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store float %0, float addrspace(1)* %out
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ret void
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}
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