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[ARM] Fix FP16 stack loads/stores for Thumb2 with frame pointer

The new addressing mode added for the v8.2A FP16 instructions uses bit 8 of the
immediate to encode the sign of the offset, like the other FP loads/stores, so
need to be treated the same way.

Differential revision: https://reviews.llvm.org/D58816

llvm-svn: 355201
This commit is contained in:
Oliver Stannard 2019-03-01 14:20:28 +00:00
parent 7628890041
commit 952753b931
2 changed files with 24 additions and 2 deletions

View File

@ -638,7 +638,7 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
// Replace the FrameIndex with fp/sp
MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
if (isSub) {
if (AddrMode == ARMII::AddrMode5)
if (AddrMode == ARMII::AddrMode5 || AddrMode == ARMII::AddrMode5FP16)
// FIXME: Not consistent.
ImmedOffset |= 1 << NumBits;
else
@ -652,7 +652,7 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
// Otherwise, offset doesn't fit. Pull in what we can to simplify
ImmedOffset = ImmedOffset & Mask;
if (isSub) {
if (AddrMode == ARMII::AddrMode5)
if (AddrMode == ARMII::AddrMode5 || AddrMode == ARMII::AddrMode5FP16)
// FIXME: Not consistent.
ImmedOffset |= 1 << NumBits;
else {

View File

@ -0,0 +1,22 @@
; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16 | FileCheck %s
; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16,+thumb-mode | FileCheck %s
; Check that frame lowering for the fp16 instructions works correctly with
; negative offsets (which happens when using the frame pointer).
define void @foo(i32 %count) {
entry:
%half_alloca = alloca half, align 2
; CHECK: vstr.16 {{s[0-9]+}}, [{{r[0-9]+}}, #-10]
store half 0.0, half* %half_alloca
call void @bar(half* %half_alloca)
; A variable-sized alloca to force the above store to use the frame pointer
; instead of the stack pointer, and so need a negative offset.
%var_alloca = alloca i32, i32 %count
call void @baz(i32* %var_alloca)
ret void
}
declare void @bar(half*)
declare void @baz(i32*)