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[AArch64] Add apple-m1 CPU, and default to it for macOS.

apple-m1 has the same level of ISA support as apple-a14,
so this is a straightforward mechanical change.  However, that
also means this inherits apple-a14's v8.5a+nobti quirkiness.

rdar://68287159
This commit is contained in:
Ahmed Bougacha 2021-04-14 19:34:55 -07:00
parent bc0540ed2d
commit 95630b78aa
3 changed files with 14 additions and 1 deletions

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@ -191,6 +191,8 @@ AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("apple-m1", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,

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@ -1208,6 +1208,9 @@ def : ProcessorModel<"apple-a12", CycloneModel, [ProcAppleA12]>;
def : ProcessorModel<"apple-a13", CycloneModel, [ProcAppleA13]>;
def : ProcessorModel<"apple-a14", CycloneModel, [ProcAppleA14]>;
// Mac CPUs
def : ProcessorModel<"apple-m1", CycloneModel, [ProcAppleA14]>;
// watch CPUs.
def : ProcessorModel<"apple-s4", CycloneModel, [ProcAppleA12]>;
def : ProcessorModel<"apple-s5", CycloneModel, [ProcAppleA12]>;

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@ -1051,6 +1051,14 @@ INSTANTIATE_TEST_CASE_P(
AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_FP16FML,
"8.5-A"),
ARMCPUTestParams("apple-m1", "armv8.5-a", "crypto-neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
AArch64::AEK_FP | AArch64::AEK_SIMD |
AArch64::AEK_LSE | AArch64::AEK_RAS |
AArch64::AEK_RDM | AArch64::AEK_RCPC |
AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_FP16FML,
"8.5-A"),
ARMCPUTestParams("apple-s4", "armv8.3-a", "crypto-neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
AArch64::AEK_FP | AArch64::AEK_SIMD |
@ -1174,7 +1182,7 @@ INSTANTIATE_TEST_CASE_P(
AArch64::AEK_LSE | AArch64::AEK_RDM,
"8.2-A")), );
static constexpr unsigned NumAArch64CPUArchs = 47;
static constexpr unsigned NumAArch64CPUArchs = 48;
TEST(TargetParserTest, testAArch64CPUArchList) {
SmallVector<StringRef, NumAArch64CPUArchs> List;