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Noticed this on inspection, fix and update some comments.
llvm-svn: 120447
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41b6b286a3
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@ -933,12 +933,13 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) {
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MachineMemOperand::MOLoad,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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// LDRH needs an additional operand.
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// ARM::STRH needs an additional operand.
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if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16)
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(StrOpc))
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.addReg(SrcReg, getKillRegState(true))
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.addFrameIndex(FI).addImm(Offset).addMemOperand(MMO));
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.addFrameIndex(FI).addReg(0).addImm(Offset)
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.addMemOperand(MMO));
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else
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(StrOpc))
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@ -948,7 +949,7 @@ bool ARMFastISel::ARMEmitStore(EVT VT, unsigned SrcReg, Address &Addr) {
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return true;
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}
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// ARM::LDRH needs an additional operand.
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// ARM::STRH needs an additional operand.
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if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16)
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(StrOpc))
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