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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 10:32:48 +02:00

[Attributor] Delete dead stores

D106185 allows us to determine if a store is needed easily. Using that
knowledge we can start to delete dead stores.

In AAIsDead we now track more state as an instruction can be dead (= the
old optimisitc state) or just "removable". A store instruction can be
removable while being very much alive, e.g., if it stores a constant
into an alloca or internal global. If we would pretend it was dead
instead of only removablewe we would ignore it when we determine what
values a load can see, so that is not what we want.

Differential Revision: https://reviews.llvm.org/D106188
This commit is contained in:
Johannes Doerfert 2021-07-16 15:40:37 -05:00
parent 5ee3942ae7
commit 95f415bd34
22 changed files with 85 additions and 198 deletions

View File

@ -3106,10 +3106,20 @@ struct AANoReturn
};
/// An abstract interface for liveness abstract attribute.
struct AAIsDead : public StateWrapper<BooleanState, AbstractAttribute> {
using Base = StateWrapper<BooleanState, AbstractAttribute>;
struct AAIsDead
: public StateWrapper<BitIntegerState<uint8_t, 3, 0>, AbstractAttribute> {
using Base = StateWrapper<BitIntegerState<uint8_t, 3, 0>, AbstractAttribute>;
AAIsDead(const IRPosition &IRP, Attributor &A) : Base(IRP) {}
/// State encoding bits. A set bit in the state means the property holds.
enum {
HAS_NO_EFFECT = 1 << 0,
IS_REMOVABLE = 1 << 1,
IS_DEAD = HAS_NO_EFFECT | IS_REMOVABLE,
};
static_assert(IS_DEAD == getBestState(), "Unexpected BEST_STATE value");
protected:
/// The query functions are protected such that other attributes need to go
/// through the Attributor interfaces: `Attributor::isAssumedDead(...)`

View File

@ -3253,10 +3253,10 @@ struct AAIsDeadValueImpl : public AAIsDead {
AAIsDeadValueImpl(const IRPosition &IRP, Attributor &A) : AAIsDead(IRP, A) {}
/// See AAIsDead::isAssumedDead().
bool isAssumedDead() const override { return getAssumed(); }
bool isAssumedDead() const override { return isAssumed(IS_DEAD); }
/// See AAIsDead::isKnownDead().
bool isKnownDead() const override { return getKnown(); }
bool isKnownDead() const override { return isKnown(IS_DEAD); }
/// See AAIsDead::isAssumedDead(BasicBlock *).
bool isAssumedDead(const BasicBlock *BB) const override { return false; }
@ -3271,7 +3271,7 @@ struct AAIsDeadValueImpl : public AAIsDead {
/// See AAIsDead::isKnownDead(Instruction *I).
bool isKnownDead(const Instruction *I) const override {
return isAssumedDead(I) && getKnown();
return isAssumedDead(I) && isKnownDead();
}
/// See AbstractAttribute::getAsStr().
@ -3343,17 +3343,38 @@ struct AAIsDeadFloating : public AAIsDeadValueImpl {
}
Instruction *I = dyn_cast<Instruction>(&getAssociatedValue());
if (!isAssumedSideEffectFree(A, I))
indicatePessimisticFixpoint();
if (!isAssumedSideEffectFree(A, I)) {
if (!isa_and_nonnull<StoreInst>(I))
indicatePessimisticFixpoint();
else
removeAssumedBits(HAS_NO_EFFECT);
}
}
bool isDeadStore(Attributor &A, StoreInst &SI) {
bool UsedAssumedInformation = false;
SmallSetVector<Value *, 4> PotentialCopies;
if (!AA::getPotentialCopiesOfStoredValue(A, SI, PotentialCopies, *this,
UsedAssumedInformation))
return false;
return llvm::all_of(PotentialCopies, [&](Value *V) {
return A.isAssumedDead(IRPosition::value(*V), this, nullptr,
UsedAssumedInformation);
});
}
/// See AbstractAttribute::updateImpl(...).
ChangeStatus updateImpl(Attributor &A) override {
Instruction *I = dyn_cast<Instruction>(&getAssociatedValue());
if (!isAssumedSideEffectFree(A, I))
return indicatePessimisticFixpoint();
if (!areAllUsesAssumedDead(A, getAssociatedValue()))
return indicatePessimisticFixpoint();
if (auto *SI = dyn_cast_or_null<StoreInst>(I)) {
if (!isDeadStore(A, *SI))
return indicatePessimisticFixpoint();
} else {
if (!isAssumedSideEffectFree(A, I))
return indicatePessimisticFixpoint();
if (!areAllUsesAssumedDead(A, getAssociatedValue()))
return indicatePessimisticFixpoint();
}
return ChangeStatus::UNCHANGED;
}
@ -3365,7 +3386,8 @@ struct AAIsDeadFloating : public AAIsDeadValueImpl {
// isAssumedSideEffectFree returns true here again because it might not be
// the case and only the users are dead but the instruction (=call) is
// still needed.
if (isAssumedSideEffectFree(A, I) && !isa<InvokeInst>(I)) {
if (isa<StoreInst>(I) ||
(isAssumedSideEffectFree(A, I) && !isa<InvokeInst>(I))) {
A.deleteAfterManifest(*I);
return ChangeStatus::CHANGED;
}

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@ -172,8 +172,6 @@ define internal i32 @caller(i32* %A) {
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[A_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i64, align 8
; IS__CGSCC_NPM-NEXT: store i64 1, i64* [[B]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 [[TMP2]], i64 undef) #[[ATTR1:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[C]]
@ -213,8 +211,6 @@ define i32 @callercaller() {
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @caller(i32 undef) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
;

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@ -99,7 +99,6 @@ define i32 @test(i32* %X) {
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval(i32) align 4 [[X]]) #[[ATTR0]]
; IS__TUNIT_OPM-NEXT: ret i32 [[C]]
;
@ -111,7 +110,6 @@ define i32 @test(i32* %X) {
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
@ -128,7 +126,6 @@ define i32 @test(i32* %X) {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* noalias nocapture nofree noundef nonnull readnone byval(i32) align 4 dereferenceable(4) [[X]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[C]]
;
@ -138,9 +135,7 @@ define i32 @test(i32* %X) {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @f(i32 undef, i64 undef, i32 [[TMP0]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[C]]

View File

@ -86,8 +86,6 @@ define internal i32 @caller(i32* %B) {
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[B_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32 undef, i32 [[TMP2]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[C]]
@ -127,8 +125,6 @@ define i32 @callercaller() {
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @caller(i32 undef) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
;

View File

@ -23,7 +23,6 @@ define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) n
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 undef, i32* [[X_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[B_PRIV_CAST]], align 8
@ -56,7 +55,6 @@ define i32 @test(i32* %X) {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT____-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT____-NEXT: ret i32 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
@ -67,7 +65,6 @@ define i32 @test(i32* %X) {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
@ -76,9 +73,7 @@ define i32 @test(i32* %X) {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 0
;
entry:

View File

@ -137,7 +137,6 @@ define i32 @main() nounwind {
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_OPM-NEXT: [[C0:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]]) #[[ATTR0]]
; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = call i32 @g(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 32 dereferenceable(12) [[S]]) #[[ATTR0]]
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
@ -151,7 +150,6 @@ define i32 @main() nounwind {
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
@ -173,7 +171,6 @@ define i32 @main() nounwind {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[TMP1]], align 32
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_OPM-NEXT: [[C0:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_SS]]) align 32 dereferenceable(12) [[S]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = call i32 @g(%struct.ss* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_SS]]) align 32 dereferenceable(12) [[S]]) #[[ATTR1]]
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
@ -185,9 +182,7 @@ define i32 @main() nounwind {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[TMP1]], align 32
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__CGSCC_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 undef, i64 undef) #[[ATTR1:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 undef, i64 undef) #[[ATTR1]]
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]

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@ -90,8 +90,6 @@ define i32 @foo() {
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 17, i32* [[A]], align 4
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @callee(i32 undef) #[[ATTR1:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
;

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@ -112,7 +112,6 @@ define internal i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) %a) {
; IS________OPM: loop:
; IS________OPM-NEXT: [[PHI:%.*]] = phi %struct.Foo* [ null, [[ENTRY:%.*]] ], [ [[A]], [[LOOP]] ]
; IS________OPM-NEXT: [[TMP0:%.*]] = phi %struct.Foo* [ [[A]], [[ENTRY]] ], [ [[TMP0]], [[LOOP]] ]
; IS________OPM-NEXT: store %struct.Foo* [[PHI]], %struct.Foo** [[A_PTR]], align 8
; IS________OPM-NEXT: br label [[LOOP]]
;
; IS__TUNIT_NPM: Function Attrs: nofree noreturn nosync nounwind readnone
@ -129,7 +128,6 @@ define internal i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) %a) {
; IS__TUNIT_NPM: loop:
; IS__TUNIT_NPM-NEXT: [[PHI:%.*]] = phi %struct.Foo* [ null, [[ENTRY:%.*]] ], [ [[A_PRIV]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = phi %struct.Foo* [ [[A_PRIV]], [[ENTRY]] ], [ [[TMP2]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: store %struct.Foo* [[PHI]], %struct.Foo** [[A_PTR]], align 8
; IS__TUNIT_NPM-NEXT: br label [[LOOP]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone
@ -138,15 +136,12 @@ define internal i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) %a) {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_FOO:%.*]], align 8
; IS__CGSCC____-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.Foo* [[A_PRIV]] to i32*
; IS__CGSCC____-NEXT: store i32 undef, i32* [[A_PRIV_CAST]], align 8
; IS__CGSCC____-NEXT: [[A_PRIV_0_1:%.*]] = getelementptr [[STRUCT_FOO]], %struct.Foo* [[A_PRIV]], i32 0, i32 1
; IS__CGSCC____-NEXT: store i64 undef, i64* [[A_PRIV_0_1]], align 8
; IS__CGSCC____-NEXT: [[A_PTR:%.*]] = alloca %struct.Foo*, align 8
; IS__CGSCC____-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC____: loop:
; IS__CGSCC____-NEXT: [[PHI:%.*]] = phi %struct.Foo* [ null, [[ENTRY:%.*]] ], [ [[A_PRIV]], [[LOOP]] ]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = phi %struct.Foo* [ [[A_PRIV]], [[ENTRY]] ], [ [[TMP2]], [[LOOP]] ]
; IS__CGSCC____-NEXT: store %struct.Foo* [[PHI]], %struct.Foo** [[A_PTR]], align 8
; IS__CGSCC____-NEXT: br label [[LOOP]]
;
entry:

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@ -50,7 +50,6 @@ define internal i32 @caller(i32* %B) {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 undef
;
@ -58,7 +57,6 @@ define internal i32 @caller(i32* %B) {
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 undef
;
@ -73,21 +71,18 @@ define i32 @callercaller() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 2, i32* [[B]], align 4
; IS__TUNIT____-NEXT: ret i32 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 0
;
%B = alloca i32

View File

@ -50,7 +50,6 @@ define internal i32 @caller(i32* %B) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@caller
; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; NOT_CGSCC_NPM-NEXT: store i32 1, i32* [[A]], align 4
; NOT_CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: ret i32 undef
;
@ -58,7 +57,6 @@ define internal i32 @caller(i32* %B) {
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 undef
;
@ -73,7 +71,6 @@ define i32 @callercaller() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 2, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2]]
; IS__TUNIT____-NEXT: ret i32 0
;
@ -81,7 +78,6 @@ define i32 @callercaller() {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 0
;
@ -89,7 +85,6 @@ define i32 @callercaller() {
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 2, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 0
;

View File

@ -18,14 +18,12 @@ define void @foo() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = alloca void (i16*)*, align 8
; IS__TUNIT____-NEXT: store void (i16*)* @bar, void (i16*)** [[TMP]], align 8
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = alloca void (i16*)*, align 8
; IS__CGSCC____-NEXT: store void (i16*)* @bar, void (i16*)** [[TMP]], align 8
; IS__CGSCC____-NEXT: ret void
;
%tmp = alloca %fun_t
@ -34,17 +32,16 @@ define void @foo() {
}
define internal void @bar(%p_t %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i16* nocapture nofree readnone [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()) #[[ATTR2:[0-9]+]], !dbg [[DBG5:![0-9]+]]
; IS__TUNIT____-NEXT: ret void
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_OPM-SAME: (i16* [[P:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()), !dbg [[DBG5:![0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: (i16* nocapture nofree readnone [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()) #[[ATTR3:[0-9]+]], !dbg [[DBG5:![0-9]+]]
; IS__CGSCC____-NEXT: ret void
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-SAME: (i16* nocapture nofree readnone [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.dbg.value(metadata i16* [[P]], metadata [[META3:![0-9]+]], metadata !DIExpression()) #[[ATTR3:[0-9]+]], !dbg [[DBG5:![0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
;
call void @llvm.dbg.value(metadata %p_t %p, metadata !4, metadata !5), !dbg !6
ret void
@ -65,17 +62,23 @@ declare void @llvm.dbg.value(metadata, metadata, metadata)
;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
; CHECK: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; CHECK: [[META3:![0-9]+]] = !DILocalVariable(name: "p", scope: !4)
; CHECK: [[META4:![0-9]+]] = distinct !DISubprogram(name: "bar", scope: null, spFlags: DISPFlagDefinition, unit: !0)
; CHECK: [[META5:![0-9]+]] = !DILocation(line: 1, column: 1, scope: !4)
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readnone willreturn }
;.
; IS__TUNIT____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; IS__TUNIT____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
; IS__TUNIT____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
;.
; IS__CGSCC____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; IS__CGSCC____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
; IS__CGSCC____: [[META2:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; IS__CGSCC____: [[META3:![0-9]+]] = !DILocalVariable(name: "p", scope: !4)
; IS__CGSCC____: [[META4:![0-9]+]] = distinct !DISubprogram(name: "bar", scope: null, spFlags: DISPFlagDefinition, unit: !0)
; IS__CGSCC____: [[META5:![0-9]+]] = !DILocation(line: 1, column: 1, scope: !4)
;.

View File

@ -22,8 +22,6 @@ define void @caller() #0 {
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller() {
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[X]], align 4
; IS__CGSCC_NPM-NEXT: call void @promote_i32_ptr(i32 undef), !prof [[PROF0:![0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
;

View File

@ -55,9 +55,7 @@ define internal void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounw
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 undef, i32* [[U_PRIV_0_1]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__CGSCC_NPM-NEXT: store i32 99, i32* [[TMP2]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i8 97, i8* [[TMP3]], align 8
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP3]], align 8

View File

@ -229,8 +229,6 @@ define i32 @visible_local_2() {
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@visible_local_2
; IS__CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 5, i32* [[B]], align 4
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_ro(i32 undef, i32 undef) #[[ATTR6:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]]
;

View File

@ -90,10 +90,8 @@ define void @func4() {
define internal void @func5(i32 %0) {
; CHECK-LABEL: define {{[^@]+}}@func5() {
; CHECK-NEXT: [[TMP:%.*]] = alloca i8*, align 8
; CHECK-NEXT: br label [[BLOCK:%.*]]
; CHECK: block:
; CHECK-NEXT: store i8* blockaddress(@func5, [[BLOCK]]), i8** [[TMP]], align 8
; CHECK-NEXT: call void @func6(i8* blockaddress(@func5, [[BLOCK]]))
; CHECK-NEXT: ret void
;

View File

@ -32,8 +32,6 @@ define internal i64 @f2(%"a"* %this) align 2 {
; IS__CGSCC____-LABEL: define {{[^@]+}}@f2
; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[THIS_ADDR:%.*]] = alloca %a*, align 8
; IS__CGSCC____-NEXT: store %a* undef, %a** [[THIS_ADDR]], align 8
; IS__CGSCC____-NEXT: ret i64 undef
;
entry:
@ -50,8 +48,6 @@ define internal void @f3(%"b"* %this) align 2 {
; IS__CGSCC____-LABEL: define {{[^@]+}}@f3
; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[THIS_ADDR:%.*]] = alloca %b*, align 8
; IS__CGSCC____-NEXT: store %b* undef, %b** [[THIS_ADDR]], align 8
; IS__CGSCC____-NEXT: ret void
;
entry:
@ -67,8 +63,6 @@ define internal i1 @f4(%"b"* %this) align 2 {
; IS__CGSCC____-LABEL: define {{[^@]+}}@f4
; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[THIS_ADDR:%.*]] = alloca %b*, align 8
; IS__CGSCC____-NEXT: store %b* undef, %b** [[THIS_ADDR]], align 8
; IS__CGSCC____-NEXT: ret i1 undef
;
entry:
@ -84,8 +78,6 @@ define internal %"a"* @f5(%"b"* %this) align 2 {
; IS__CGSCC____-LABEL: define {{[^@]+}}@f5
; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[THIS_ADDR:%.*]] = alloca %b*, align 8
; IS__CGSCC____-NEXT: store %b* undef, %b** [[THIS_ADDR]], align 8
; IS__CGSCC____-NEXT: ret %a* undef
;
entry:

View File

@ -105,11 +105,8 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR7:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR5:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
@ -117,13 +114,13 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR5]]
; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
@ -144,11 +141,8 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR6:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR4:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
@ -156,13 +150,13 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR4]]
; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
@ -183,11 +177,8 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__CGSCC____-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR8:[0-9]+]]
; IS__CGSCC____-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__CGSCC____-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__CGSCC____-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__CGSCC____-NEXT: store float 0x40019999A0000000, float* [[F2]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__CGSCC____-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__CGSCC____-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__CGSCC____-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__CGSCC____-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR9:[0-9]+]]
; IS__CGSCC____-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
@ -195,13 +186,13 @@ define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) alig
; IS__CGSCC____-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__CGSCC____-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR9]]
; IS__CGSCC____-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__CGSCC____-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__CGSCC____-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__CGSCC____-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__CGSCC____-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__CGSCC____-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10]]
; IS__CGSCC____-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__CGSCC____-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__CGSCC____-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__CGSCC____-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11]]
; IS__CGSCC____-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__CGSCC____-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__CGSCC____-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__CGSCC____-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
@ -359,8 +350,10 @@ define void @local_alloca_simplifiable_2() {
; IS__TUNIT_OPM: for.cond.cleanup30:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_OPM: for.body31:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: [[I23:%.*]] = load i8, i8* [[ARRAYIDX33]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_OPM-NEXT: store i8 [[I23]], i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC36]]
; IS__TUNIT_OPM: for.inc36:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
@ -442,8 +435,10 @@ define void @local_alloca_simplifiable_2() {
; IS__TUNIT_NPM: for.cond.cleanup30:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_NPM: for.body31:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_NPM-NEXT: [[I23:%.*]] = load i8, i8* [[ARRAYIDX33]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_NPM-NEXT: store i8 [[I23]], i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA15]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]]
; IS__TUNIT_NPM: for.inc36:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
@ -795,8 +790,6 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR7]]
; IS__TUNIT_OPM-NEXT: store i32 5, i32* @GI1, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: store i32 5, i32* [[L]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true:
@ -815,8 +808,6 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR6]]
; IS__TUNIT_NPM-NEXT: store i32 5, i32* @GI1, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: store i32 5, i32* [[L]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_NPM: cond.true:
@ -835,8 +826,6 @@ define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__CGSCC____-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR8]]
; IS__CGSCC____-NEXT: store i32 5, i32* @GI1, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: store i32 5, i32* [[L]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__CGSCC____: cond.true:
@ -894,8 +883,6 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_OPM: cond.false:
; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[COND:%.*]] = phi i32* [ @GI2, [[COND_TRUE]] ], [ [[L]], [[COND_FALSE]] ]
; IS__TUNIT_OPM-NEXT: store i32 5, i32* [[COND]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR7]]
; IS__TUNIT_OPM-NEXT: ret i32 5
@ -914,8 +901,6 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
; IS__TUNIT_NPM: cond.end:
; IS__TUNIT_NPM-NEXT: [[COND:%.*]] = phi i32* [ @GI2, [[COND_TRUE]] ], [ [[L]], [[COND_FALSE]] ]
; IS__TUNIT_NPM-NEXT: store i32 5, i32* [[COND]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR6]]
; IS__TUNIT_NPM-NEXT: ret i32 5
@ -934,8 +919,6 @@ define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__CGSCC____: cond.false:
; IS__CGSCC____-NEXT: br label [[COND_END]]
; IS__CGSCC____: cond.end:
; IS__CGSCC____-NEXT: [[COND:%.*]] = phi i32* [ @GI2, [[COND_TRUE]] ], [ [[L]], [[COND_FALSE]] ]
; IS__CGSCC____-NEXT: store i32 5, i32* [[COND]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR8]]
; IS__CGSCC____-NEXT: ret i32 5
@ -985,9 +968,6 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 3), align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 4), align 4, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 5), align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR5]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR5]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR5]]
@ -1013,9 +993,6 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 3), align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 4), align 4, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 5), align 4, !tbaa [[TBAA11]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR4]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR4]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR4]]
@ -1041,9 +1018,6 @@ define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) ali
; IS__CGSCC____-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__CGSCC____-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store float 0x3FF19999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 3), align 4, !tbaa [[TBAA7]]
; IS__CGSCC____-NEXT: store float 0x40019999A0000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 4), align 4, !tbaa [[TBAA10]]
; IS__CGSCC____-NEXT: store float 0x400A666660000000, float* getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 5), align 4, !tbaa [[TBAA11]]
; IS__CGSCC____-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR9]]
; IS__CGSCC____-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR9]]
; IS__CGSCC____-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR9]]
@ -2528,19 +2502,16 @@ define i32 @write_read_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_undef_int1, align 4
; IS__TUNIT_OPM-NEXT: ret i32 7
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gstatic_undef_int1, align 4
; IS__TUNIT_NPM-NEXT: ret i32 7
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_undef_int1, align 4
; IS__CGSCC____-NEXT: ret i32 7
;
store i32 7, i32* @Gstatic_undef_int1
@ -2551,13 +2522,11 @@ define void @write_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4
; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4
; IS__TUNIT_NPM-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly

View File

@ -569,7 +569,6 @@ define internal void @test_byval(%struct.X* byval(%struct.X) %a) {
; IS__CGSCC_NPM-SAME: (i8* noalias nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8**
; IS__CGSCC_NPM-NEXT: store i8* undef, i8** [[A_PRIV_CAST]], align 8
; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS__CGSCC_NPM-NEXT: ret void

View File

@ -10,8 +10,6 @@
; Check the original function, which is wrapped and becomes anonymous
; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK: define internal noundef i32 @0()
; CHECK: %a = alloca i32
; CHECK: store i32 1, i32* %a
; CHECK: ret i32 1
define linkonce i32 @inner1() {
entry:

View File

@ -913,13 +913,11 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1:[0-9]+]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
; CHECK: user_code.entry:
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2:[0-9]+]]
; CHECK-NEXT: store i32 undef, i32* [[DOTTHREADID_TEMP_]], align 4
; CHECK-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 false, i1 true)
; CHECK-NEXT: ret void
@ -940,8 +938,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR7:[0-9]+]]
; CHECK-NEXT: ret void
;
@ -987,7 +983,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1043,7 +1038,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS1:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__2 to i8*), i8* noundef @__omp_outlined__2_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
@ -1059,8 +1053,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8:[0-9]+]]
; CHECK-NEXT: ret void
;
@ -1087,8 +1079,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p1() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1116,7 +1106,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1177,7 +1166,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @simple_state_machine_interprocedural_before.internalized() #[[ATTR7]]
; CHECK-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR7]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
@ -1215,8 +1203,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p1() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1266,7 +1252,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1324,7 +1309,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS1:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef @__omp_outlined__7_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
@ -1340,8 +1324,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1368,8 +1350,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p1() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1397,7 +1377,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1453,7 +1432,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS1:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__10 to i8*), i8* noundef @__omp_outlined__10_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
@ -1469,8 +1447,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1497,8 +1473,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p1() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1525,7 +1499,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef true, i1 noundef false, i1 noundef false)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
@ -1548,7 +1521,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS1:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__13 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__13_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
@ -1563,8 +1535,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1591,8 +1561,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p1() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1620,7 +1588,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1653,7 +1620,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
; CHECK: user_code.entry:
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; CHECK-NEXT: store i32 undef, i32* [[DOTTHREADID_TEMP_]], align 4
; CHECK-NEXT: call void @__omp_outlined__15(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 false, i1 true)
; CHECK-NEXT: ret void
@ -1667,8 +1633,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[CALL:%.*]] = call i32 @omp_get_thread_num() #[[ATTR2]]
; CHECK-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR7]]
; CHECK-NEXT: ret void
@ -1721,7 +1685,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* noalias noundef nonnull readnone align 8 dereferenceable(24) @[[GLOB1]], i1 noundef false, i1 noundef false, i1 noundef true)
; CHECK-NEXT: [[THREAD_IS_WORKER:%.*]] = icmp ne i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[THREAD_IS_WORKER]], label [[WORKER_STATE_MACHINE_BEGIN:%.*]], label [[THREAD_USER_CODE_CHECK:%.*]]
@ -1750,7 +1713,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
; CHECK: user_code.entry:
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; CHECK-NEXT: store i32 undef, i32* [[DOTTHREADID_TEMP_]], align 4
; CHECK-NEXT: call void @__omp_outlined__16(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i1 false, i1 true)
; CHECK-NEXT: ret void
@ -1764,8 +1726,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @weak_callee_empty() #[[ATTR7]]
; CHECK-NEXT: ret void
;
@ -1783,8 +1743,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1811,8 +1769,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;
@ -1861,8 +1817,6 @@ attributes #10 = { convergent nounwind readonly willreturn }
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @p0() #[[ATTR8]]
; CHECK-NEXT: ret void
;

View File

@ -75,7 +75,6 @@ define weak void @__omp_offloading_14_5896c35_sequential_loop_l5() #0 {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
@ -118,7 +117,6 @@ define internal void @__omp_outlined__(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: store i32 0, i32* [[I]], align 4
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
@ -178,8 +176,6 @@ define internal void @__omp_outlined__1(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @unknown() #[[ATTR5:[0-9]+]]
; CHECK-NEXT: ret void
;
@ -238,7 +234,6 @@ define weak void @__omp_offloading_14_5896c35_sequential_loop_to_stack_var_l20()
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
@ -279,7 +274,6 @@ define internal void @__omp_outlined__2(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; CHECK-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32*
; CHECK-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR4]]
@ -350,8 +344,6 @@ define internal void @__omp_outlined__3(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: call void @unknown() #[[ATTR5]]
; CHECK-NEXT: ret void
;
@ -400,7 +392,6 @@ define weak void @__omp_offloading_14_5896c35_sequential_loop_to_shared_var_l35(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i1 true, i1 false, i1 false)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
@ -441,7 +432,6 @@ define internal void @__omp_outlined__4(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; CHECK-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: store i32 0, i32* [[I]], align 4
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
@ -510,8 +500,6 @@ define internal void @__omp_outlined__5(i32* noalias %.global_tid., i32* noalias
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTGLOBAL_TID__ADDR]], align 8
; CHECK-NEXT: store i32* undef, i32** [[DOTBOUND_TID__ADDR]], align 8
; CHECK-NEXT: store i32* [[X]], i32** [[X_ADDR]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4
; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1