RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[X86] Mark the Key Locker instructions as NotMemoryFoldable to make the X86FoldTablesEmitter not crash.

Browse Source 
loadiwkey and aesenc128kl share the same opcode but one is memory
and one is register. But they're behavior is quite different. We
were crashing because one has an output register and one doesn't
and the backend couldn't account for that. But since they aren't
foldable we can just add NotMemoryFoldable so they won't be looked at.
This commit is contained in:
Craig Topper 2020-10-17 16:35:37 -07:00
parent 99be25a2bd
commit 95f53f42e4
1 changed files with 22 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
lib/Target/X86/X86InstrKL.td
View File

@ -20,17 +20,20 @@ let SchedRW = [WriteSystem], Predicates = [HasKL] in {
let Uses = [XMM0, EAX], Defs = [EFLAGS] in {
def LOADIWKEY : I<0xDC, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
"loadiwkey\t{$src2, $src1|$src1, $src2}",
[(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS;
[(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS,
NotMemoryFoldable;
}
let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in {
def ENCODEKEY128 : I<0xFA, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
"encodekey128\t{$src, $dst|$dst, $src}", []>, T8XS;
"encodekey128\t{$src, $dst|$dst, $src}", []>, T8XS,
NotMemoryFoldable;
}
let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in {
def ENCODEKEY256 : I<0xFB, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
"encodekey256\t{$src, $dst|$dst, $src}", []>, T8XS;
"encodekey256\t{$src, $dst|$dst, $src}", []>, T8XS,
NotMemoryFoldable;
}
let Constraints = "$src1 = $dst",
@ -38,22 +41,26 @@ let SchedRW = [WriteSystem], Predicates = [HasKL] in {
def AESENC128KL : I<0xDC, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
"aesenc128kl\t{$src2, $src1|$src1, $src2}",
[(set VR128:$dst, EFLAGS,
(X86aesenc128kl VR128:$src1, addr:$src2))]>, T8XS;
(X86aesenc128kl VR128:$src1, addr:$src2))]>, T8XS,
NotMemoryFoldable;
def AESDEC128KL : I<0xDD, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
"aesdec128kl\t{$src2, $src1|$src1, $src2}",
[(set VR128:$dst, EFLAGS,
(X86aesdec128kl VR128:$src1, addr:$src2))]>, T8XS;
(X86aesdec128kl VR128:$src1, addr:$src2))]>, T8XS,
NotMemoryFoldable;
def AESENC256KL : I<0xDE, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
"aesenc256kl\t{$src2, $src1|$src1, $src2}",
[(set VR128:$dst, EFLAGS,
(X86aesenc256kl VR128:$src1, addr:$src2))]>, T8XS;
(X86aesenc256kl VR128:$src1, addr:$src2))]>, T8XS,
NotMemoryFoldable;
def AESDEC256KL : I<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
"aesdec256kl\t{$src2, $src1|$src1, $src2}",
[(set VR128:$dst, EFLAGS,
(X86aesdec256kl VR128:$src1, addr:$src2))]>, T8XS;
(X86aesdec256kl VR128:$src1, addr:$src2))]>, T8XS,
NotMemoryFoldable;
}
} // SchedRW, Predicates
@ -63,13 +70,17 @@ let SchedRW = [WriteSystem], Predicates = [HasWIDEKL] in {
Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
mayLoad = 1 in {
def AESENCWIDE128KL : I<0xD8, MRM0m, (outs), (ins opaquemem:$src),
"aesencwide128kl\t$src", []>, T8XS;
"aesencwide128kl\t$src", []>, T8XS,
NotMemoryFoldable;
def AESDECWIDE128KL : I<0xD8, MRM1m, (outs), (ins opaquemem:$src),
"aesdecwide128kl\t$src", []>, T8XS;
"aesdecwide128kl\t$src", []>, T8XS,
NotMemoryFoldable;
def AESENCWIDE256KL : I<0xD8, MRM2m, (outs), (ins opaquemem:$src),
"aesencwide256kl\t$src", []>, T8XS;
"aesencwide256kl\t$src", []>, T8XS,
NotMemoryFoldable;
def AESDECWIDE256KL : I<0xD8, MRM3m, (outs), (ins opaquemem:$src),
"aesdecwide256kl\t$src", []>, T8XS;
"aesdecwide256kl\t$src", []>, T8XS,
NotMemoryFoldable;
}
} // SchedRW, Predicates